1.stm32 F407VG starup_stm32f40_41xxx.s The following location called IMPORT Systeminit, and then called the main function, so enter the main function when the clock configuration has been automatically completed.
2. Complete the clock configuration in the Systeminit function,with the following comments do not need to explain more, at a glance.
The following comments intercept from system_stm32f4xx.c *============================================================================= * supported stm32f40xxx/41xxx devices * * ---------------------------------------------------------------------------- * System Clock Source | PLL (HSE) *----------------------------------------------------------------------------- *  SYSCLK (Hz) | 168000000 *----------------------------------------------------------------------------- *  HCLK (Hz) &N Bsp | 168000000 *----------------------------------------------------------------------------- *  AHB prescaler . | 1 *----------------------------------------------------------------------------- *  APB1 prescaler | 4 *----------------------------------------------------------------------------- *  APB2 prescaler | 2 *----------------------------------------------------------------------------- * hse Frequency (Hz) | 25000000 *----------------------------------------------------------------------------- * pll_m   | 25 *----------------------------------------------------------------------------- * pll_n &NBSP ; | 336 *----------------------------------------------------------------------------- * pll_p &NBSP ; | 2 *----------------------------------------------------------------------------- * pll_q &NBSP ; | 7 *----------------------------------------------------------------------------- * plli2s_n &NBSp | na *----------------------------------------------------------------------------- * plli2s_r &N BSP; | na *----------------------------------------------------------------------------- *  I2S input clock | na *----------------------------------------------------------------------------- *  VDD (V) &NBS P | 3.3 *----------------------------------------------------------------------------- * main regulator output voltage | Scale1 mode *----------------------------------------------------------------------------- * flash Latency (WS) & nbsp | 5 *----------------------------------------------------------------------------- * prefetch Buffer | on *----------------------------------------------------------------------------- * instruction Cache | on *----------------------------------------------------------------------------- * data Cache | on *----------------------------------------------------------------------------- * require 48MHzFor USB OTG FS, | disabled * sdio and RNG clock &NB Sp | *-----------------------------------------------------------------------------
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STM32F407VG (quad) clock configuration
