Summarization of assembly language Programming review

Basic knowledge

1. The source, function, and calculation of the complement. complement (complement), Inverse code (one ' s complement).

80x86 Computer Organization

2. Intel 8086 Processor Word length, data bus width, address bus width, addressing space.
4. The operating mode of the processor: Real mode, Protected mode, virtual 86 mode.
6. Virtual storage technology is not the expansion of memory to external memory, but should be the flow of water into the memory, the implementation of programs larger than the memory.
8. CPU composition.
10. Register group, each register name, purpose.
12. The AF bit of the flags register is useful for 8421BCD code operations.
14. To do addition operations, the of and SF are considered together to represent signed number additions, considering that CF is unsigned number addition. AF represents a half-byte carry, and whether the number of binary 1 is even if the PF even flag bit is represented. If the addend sign bit is different, then the highest bit of the result is directly 0,sf, CF depends on the sum of unsigned numbers and no carry.
16. Universal registers, dedicated registers, segment registers. (SP in the end general or dedicated AH??? (?﹏?) ）
18. Variable address register: Bp,sp,si,di.
20. Low-down address, high-level address.
22. The same address can be a byte address, a word address, or a double-word address, as determined by the actual situation. (for example, PTR does a type conversion)
24. Real mode Addressing: Address segmentation method resolves a 16-bit word-length transmission 20-bit address (1MB addressing space) issue. Segment Size (1 to 64KB). Paragraph starting at the beginning of the small section of the first address, each 16 bits of a small segment, a total of 64K pieces. Physical Address = Segment Address (or segment base site) <<16 bit + offset address = 16Dx Segment address + offset address. The physical address is unique and the logical address is not unique.
26. Segment overlap: not really overlap, just the size of the segment can be flexible, do not need to occupy 64KB, can be multiple segments of public 64KB space.
28. 1MB of memory can be divided into up to 64K segments, with a minimum of 16 segments (and no overlap between them). Each segment is at least 16 bytes (small segment) and the maximum is 64KB.
30. The segment register corresponds to the offset address register.
32. Segment spanning prefix: Specifies segment registers using segments spanning prefixes when the segment used is not the default segment.
34. Protected mode addressing: A logical address consists of a selector and an offset address. The offset address is no longer 16 bits, but 32 bits, and the maximum length of the segment is extended to 4GB.
36. Protection Mode benefits: supports greater addressing space, supports multitasking management, and supports virtual storage management.
38. Segment Descriptor: The size, position, control information, state information, and the address, bounds, access rights and additional fields.
40. A set of registers for the peripheral interface: data registers, status registers, command registers.
42. IO port address: The address of a set of registers is independent of the memory addressing.
44. The IO address space is up to 64KB 8-bit ports or 32KB 16-bit ports, even though the 32-bit port number is extended in 386 and subsequent models.
46. To facilitate the user's use of peripherals, 80X86 provides two types of routines (interrupt service program), one BIOS, one DOS, and the use of interrupt mode (INT) for execution.
48. Higher DOS level, priority should be used. The second is the BIOS (write ROM, which is part of the hardware), and finally the peripheral calling program.

80x86 instruction system and addressing method

1. One address (INC, DEC), two addresses (majority), three address directives (few, such as SHL).
2. Operation code as long as the unique binary code can be determined, but in order to facilitate the memory, the use of mnemonics to denote opcode, one by one.
3. Addressing method: Related to data, and transfer address.
4. Seven types of data-related addressing, four addressing methods related to transfer addresses.
5. Register addressing 16 bits using AB, BX, CX, DX, BP, SP, SI, di;8 bits using Ah, AL, BH, BL, CH, CL, DH, DL.
6. Register indirection, register in relative addressing can only be BX (addressed in the data segment), BP (addressed in the stack segment), SI, DI.
7. Base address variable address, relative base address address, base address with BX (data segment), BP (stack segment), variable address with SI, DI.
8. The dual operand instruction can only have one operand in the Register mode except the immediate number method. (not both are internal certificates)

Summarization of assembly language Programming review