Swap 7th and 0th 6th-1 5-2 4-3 in Al

This can also be done through the cyclic shift operation:
MoV Al, 12 h; original data in Al
MoV CX, 8; Al, byte type, total 8 bits
MoV ah, 0; Ah is used as the intermediate register for transposition. The initial value is 0.
L_1bit:
SHL Al, 1; shifts 1 to the left, and the current highest bit enters cf
RCR ah, 1; Ah shifts 1 to the right, and CF enters the highest position of AH.
Loop l_1bit; 8 in total this Cycle Shift
MoV Al, Ah; the final result is in Al
MoV ah, 0; center register Ah cleared

On csdnZARA (Kyrie eleison)Provide simplified answers

; 4-digit high
XOR ax, ax
Xor bx, BX
Xor cx, CX
XOR dx, DX
MoV BL, 4; Calculator
Again2: mov Al, memb; fetch data
MoV Cl, BH
Sal Cl, 1; Calculate 2n + 1 (n = 0) as 1 3
Add Cl, 1
Cmp bl, 2
Jbe con12; x <= 2
Rol Al, Cl
JMP judge2
Con12: Dec BH
MoV Cl, BH
Sal Cl, 1
Add Cl, 1
Ror Al, Cl
Judge2: cmp bl, 4
JZ msk12
Cmp bl, 3
JZ msk22
Cmp bl, 2
JZ msk32
Cmp bl, 1
JZ msk42
JMP exit
Msk12: and Al, 01 H
JMP afte2
Msk22: and Al, 02 h
JMP afte2
Msk32: and Al, 04 H
JMP afte2
Msk42: and Al, 08 h
Afte2: or DL, Al
Cmp bl, 2
JZ count32
Inc bh; plus 1
Count32: Dec BL
Jnz again2; ZF = 0 is connected to the BL counter inverse COUNTING METHOD

; 4 lower
XOR ax, ax
Xor bx, BX
Xor cx, CX
MoV BL, 4; Calculator
MoV BH, 0
Again: mov Al, memb; fetch data
MoV Cl, BH
Sal Cl, 1
Add Cl, 1
Cmp bl, 2
Jbe con1;
Ror Al, Cl
JMP judge
Con1: Dec BH
MoV Cl, BH
Sal Cl, 1
Add Cl, 1
Rol Al, Cl
JUDGE: cmp bl, 4
JZ msk1
Cmp bl, 3
JZ msk2
Cmp bl, 2
JZ msk3
Cmp bl, 1
JZ msk4
JMP exit
Msk1: and Al, 80 h
JMP afte
Msk2: and Al, 40 h
JMP afte
Msk3: and Al, 20 h
JMP afte
Msk4: and Al, 10 h
Afte: or DL, Al
Cmp bl, 2
JZ count3
Inc bh; plus 1
Count3: Dec BL
Jnz again; ZF = 0
MoV Rel, DL; the final value is saved in DL
Exit: mov ah, 4ch
Int 21 h
My Algorithms