Task Switching and TSS in Linux in x86 System

This article mainly introduces the x86 SystemLinuxInTask SwitchingAndTSSI believe that you will have a deeper understanding of the Linux system.

Example of the role of TSS: to save the registers used by tasks at different privileged levels, especially esp, because, for example, when a task is interrupted and involves a special switch (one task switch ), first, we need to switch the stack. This stack is obviously the kernel stack. So how can we find the stack address? This must be obtained from the tss segment, in this way, subsequent execution will be relied on (on x86 machines, C function calls are implemented through stacks ). As long as the task switches from the Local Privilege ring to the high privilege ring, the stack corresponding to the high privilege ring needs to be found. Therefore, esp2, esp1, and esp0 must have at least three esp instances, however, only esp0 is used in Linux.

What is TSS: TSS is a segment and the segment is x86. In protection mode, the segment selector participates in addressing, and the segment selector is in the segment register, the tss segment is in the tr register.

Intel's suggestion: Prepare an independent TSS segment for each process. During process switching, switch the tr register to point it to the corresponding TSS segment of the process, then, when the task is switched (for example, an interrupt that involves a privileged-level switch), all registers are retained using this segment.

Linux practices:

1. Linux does not prepare a tss segment for each process. Instead, each cpu uses a tss segment and the tr register saves the segment. During process switching, only the esp0 field in the unique tss segment is updated to the kernel stack of the new process.

2. in the tss segment of Linux, only fields such as esp0 and iomap are used, instead of storing registers. When a user process is interrupted and enters ring0, esp0 is extracted from the tss and then switched to esp0, other registers are stored on the kernel stack indicated by esp0 instead of the tss.

3. As a result, each cpu in Linux has only one tss segment, and the tr register always points to it. It complies with the x86 processor usage specifications, but does not follow intel's recommendations. The consequence is that the overhead is lower because you do not have to switch the tr register.

Linux implementation:

1. Define tss:

struct tss_struct init_tss[NR_CPUS] __cacheline_aligned = { [0 ... NR_CPUS-1] = INIT_TSS };(arch/i386/kernel/init_task.c)

INIT_TSS is defined:

 
 

  
  
#define INIT_TSS  {                              
  
  
.esp0        = sizeof(init_stack) + (long)&init_stack,      
  
  
.ss0        = __KERNEL_DS,                      
  
  
.esp1        = sizeof(init_tss[0]) + (long)&init_tss[0],      
  
  
.ss1        = __KERNEL_CS,                      
  
  
.ldt        = GDT_ENTRY_LDT,                  
  
  
.io_bitmap_base    = INVALID_IO_BITMAP_OFFSET,              
  
  
.io_bitmap    = { [ 0 ... IO_BITMAP_LONGS] = ~0 },          
  
  
} 
 
 

2. initialize tss:

 
 

  
  
struct tss_struct * t = init_tss + cpu;  
  
  
...  
  
  
load_esp0(t, thread);  
  
  
set_tss_desc(cpu,t);  
  
  
cpu_gdt_table[cpu][GDT_ENTRY_TSS].b &= 0xfffffdff;  
  
  
load_TR_desc();  
 
 

Related functions or macros are:

 
 

  
  
#define load_TR_desc() __asm__ __volatile__("ltr %%ax"::"a" (GDT_ENTRY_TSS*8))  
  
  
static inline void __set_tss_desc(unsigned int cpu, unsigned int entry, void *addr)  
  
  
{  
  
  
_set_tssldt_desc(&cpu_gdt_table[cpu][entry], (int)addr,  
  
  
offsetof(struct tss_struct, __cacheline_filler) - 1, 0x89);  
  
  
}  
  
  
#define set_tss_desc(cpu,addr) __set_tss_desc(cpu, GDT_ENTRY_TSS, addr) 
 
 

After the above initialization, tr always points to the unique tss segment. However, esp0 and iomap In the tss segment are constantly changing with the process switching.
3. During process switching, you can switch esp0 and iomap in the globally unique tss segment:
In _ switch_to:

 
 

  
  
struct tss_struct *tss = init_tss + cpu;  
  
  
...  
  
  
load_esp0(tss, next); 
 
 

This changes the esp0 of the tss.
In this case, if the process is interrupted in the user State, the machine switches to ring0, extracts the unique tss segment from tr, finds its esp0, and switches the stack to another one, then, all other registers are stored in the kernel indicated by the current esp0 In the tss, that is, the ring0 stack.