The analysis and characteristics of several usual electric-leveling in the 21st chapter of FPGA Whole-step---practical walkthrough

Ttl,cmos and Lvttl,lvcmos

TTL and CMOS are two common logic levels in digital circuits, and Lvttl and Lvcmos are both low-level versions. TTL is a flow control device, the input resistance is small, TTL level device speed, high drive capacity, but large power consumption. CMOS is the MOS logic, as a voltage control device, and the input resistance is very large, CMOS level device slow, low drive capacity TTL, but low power consumption. It is due to the high input impedance of CMOS devices, the external micro-interference may cause the level of the flip, so the unused input pins on the CMOS device should be pulled up and down, not floating.

since the TTL and CMOS levels are different at 0 or 1 o'clock, the Voh (sender) > VIH (Receiver) must be met, and a certain noise tolerance is provided, and the Sender vol is less than the receiver Vil and provides a certain noise tolerance.

High logic level drive low logic, can be series 50~330ω resistor for level conversion. Where Jtag is an example, when using the Cyclone III chip, the JTAG is 2.5V level, and Cyclone III is 3.3V level, when using the string connection resistor, in order to achieve the level of conversion. Series resistance sometimes for components with strong driving capacity such as 74LVT series, in order to eliminate the signal ringing, can be series resistance to eliminate the signal ringing phenomenon.

Two nouns related to drive capability: pull current and sink current.

Pull current: Pull current refers to the current direction is negative, current outflow device, called pull current, such as IOH;

Sink current: Sink current refers to the current direction is positive, the current flow into the device, called the sink current, such as IOL;

Bipolar process device, characterized by high speed, strong driving capacity, but the power consumption, CMOS process device, the drive capacity and speed is weaker than bipolar, but its high integration, low power consumption, and BiCMOS both bipolar and CMOS advantages.

CMOS and TTL are not suitable for high-speed circuit reasons

1) High level amplitude, even low-level version, swing to 3.3V or 2.5V, so the signal changes along the time spent longer, not suitable for transmission frequency of more than 200MHz signal.

2) The output signal is single-ended. be susceptible to interference on the transmission path, not conducive to long-range transmission

3) Large power consumption.

What you need to know about the device manuals

As a hardware engineer, every day needs to deal with a variety of electronic components manuals, then the manual for some of the parameter values we often need to care about. When selecting a device, it is often possible to select the appropriate chip based on the parameter values of these devices.

1) Features: Generally when we look at the manual, the first page of the manual on the device Features, which is what we need to care about, through this Features we can remove some of the unsuitable chip.

2) Absolute Maximum ratings: This part is what we often need to pay attention to, the device limit parameter value. Some of these parameters must be understood:

1 "VCC: supply voltage. First, ensure that the power supply voltage overshoot is less than the limit value during power-up and down-power; second, normal operation

The maximum value of the supply voltage plus the ripple voltage is less than the limit value.

2 "VI: Input signal level, requires the input signal rising edge and the falling edge of the overshoot can not exceed a certain value.

3 "VO: Output signal level, generally see -0.5v (min), VCC + 0.5V (max) where VCC should be the voltage at which the device is operating, not the maximum voltage value.

4 "IIK: Input clamp Current, which is the maximum current allowed to flow into the device input when the operating voltage is outside the normal value.

5 "IOK: Output clamp Current, which is the maximum current allowed to flow into the output of the device when the operating voltage is outside the normal value.

3) Electrical Characteristics: This part is what we often need to pay attention to, the device electrical parameter values. Some of these parameters must be understood:

II: The current of the input port (input signal is high) or outgoing at work (input signal is low) when the device is operating normally. The CMOS process logic device is a voltage-controlled type, the input current is very small, through the device parameter II and ICC can determine whether the process type of the device is CMOS, or TTL process.

CI: The input capacitance, which refers to the parasitic capacitance of the logic device input port, can be regarded as the driving capability in the circuit design. such as the Cypress CY2305 device data, the definition of the CL parameter is 30pF, that is, the device output pin capacitive load capacity is 30pF, for the 74lvc125a device CI is 5pF, so a CY2305 can drive up to 6 74lvc125a devices.

The analysis and characteristics of several usual electric-leveling in the 21st chapter of FPGA Whole-step---practical walkthrough