The bus in arm

the bus in arm

The bus in arm is used for communication between different parts. There are two different types of devices connected to the bus: ARM processor, which is the main device of the bus, has the right to arbitrate on the bus, can initiate the data transmission request via the same bus; the peripheral device, which is the slave device of the bus, is passive on the bus and can only react to a transmission request from the main device.

The bus structure of arm, called AMBA (Advanced Micro-control bus structure), is an open bus structure introduced by arm, and it is a popular industry standard biased structure at present. The AMBA2.0 specification consists of four parts: AHB, ASB, APB, and test methodology, and the main application is AHB, APB.

The AHB is primarily used for connections between high-performance modules such as CPUs, DMA, and DSP, and as a bias bus system for the SOC, it includes the following features:

Single-clock Edge Operation

Non-tristate implementation

Burst transfers

Split transaction (segmented transfer)

Multiple Bus Master

Configurable 32-bit ~128-bit bus width, support for byte, half word and word transmission. AHB system master, slave and infrastructure are composed of three parts. The transmission on the entire AHB is issued by master and is responded by slave. And infrastructure consists of 7 parts: Arbiter, Master-to-slave multiplexer, Slave-to-master multiplexer, Decoder, Dummy Slave, Dummy Master.

Since AHB supports multiple master, arbiter is required to arbitrate, decoder is responsible for address decoding; Dummy slave is virtual Slave;dummy master is virtual master.

APB is a peripheral bus, mainly for low-bandwidth on-chip peripheral peripherals between the connection, such as the UART, and its bus structure does not want to AHB support multiple master, in the APB, the only master is the APB Bridge, so there is no need for arbitration.

Between AHB and APB, there is the AHB-APB bridge, which is designed to solve the problem of matching the home of high-performance devices and on-chip low-bandwidth peripherals; Between the AHB and the off-chip bus, there is a ahb-alien, which is designed to address the bandwidth mismatch between on-chip high-performance devices and off-chip devices.

For further details, refer to:

"Introduction to AMBA Bus System"

"ARM Amba Bus Introduction" http://blog.chinaunix.net/u2/60011/showart_1071564.html