The difference between CFI and SPI Flash

1. Flash can be divided into two types: NOR flash and NAND flash, depending on the internal storage structure.
Nor flash: Like access to SDRAM, according to the data/address bus direct access, can write less and slower, because its reading time is similar to SRAM, read address is a linear structure, more for program code storage.

NAND Flash: Only 8-bit/16-bit/32-bit or more bit-wide bus, each access, the long address is divided into several parts, a little bit of distribution in order to access NAND flash. Nand Flash compared to the rest of the other flash advantage lies in the number of erasable, write faster, but in the use and use of the process will have a bad block so need to do special processing to use. It is mainly used for data storage, and most USB drives are NAND Flash.

There is a big difference between the life of NAND and NOR, the speed of block erase, the chance of error in data storage, and so on.
2. External flash by the interface of the bus Flash,spi Flash.
The bus flash requires an external bus interface on your MCU, and SPI Flash reads and writes to Flash through the SPI port.
Speed, the bus flash is faster than SPI, but the SPI is cheap

3. Nor Flash, according to the external interface points, can be divided into ordinary interface and SPI interface.

The common interface of nor Flash, most support CFI interface, so, generally also known as the CFI interface.

CFI interface, as opposed to the SPI of the serial port, also known as the parallel interface, parallel interface;

In addition, the CFI interface is JEDEC-defined, so that some of the CFI interfaces are JEDEC interfaces.

Therefore, it can be simply understood as: for nor flash, CFI interface =jedec interface =parallel interface = Parallel interface

1) Spi:serial Peripheral Interface Serial Peripheral Device interface, is a common clock synchronous serial communication interface.

2) CFI, in English the full name is common Flash interface, which is the public flash interface, is defined by the storage chip industry to obtain the physical parameters and structural parameters of the flash memory chip operating procedures and standards. CFI has many rules about flash memory chips, which facilitates the embedded programming of Flash. Many nor FLASH support CFI now, but not all of them are supported. 3) Common Parallel/cfi/jedec interface of NOR flash pin more, chip relatively large. All will have SPI interface, mainly relative cfi/parallel nor, can reduce the number of pins, reduce the size of the chip package, using the SPI or Flash, only 8 pins.

4) SPI Flash and parallel media are Norflash, but SPI is through the serial interface to achieve data operation, and parallel parallel interface for data operation, SPI capacity is not very large, the market Numonyx bigger can do 128mbit, The reading and writing speed is slow, but the price is cheap, the operation is simple. and parallel interface speed, capacity on the market already has 1Gmbit capacity, the price is expensive