The difference between Nandflash and Norflash

A NAND and NOR's comparisons
Nor and NAND are two of the main non-slipped technologies in the market today. Intel first developed nor Flash technology in 1988, radically altering the original eminence of Eprom and EEPROM. Then, in 1989, Toshiba released the NAND flash structure, emphasizing lower cost per bit, higher performance, and easily upgradeable through interfaces like disks. But after more than 10 years, there are still quite a few hardware engineers who are not clear nor and NAND flash. The phase "flash memory" can often be used interchangeably with the phase "nor memory". Many in the industry are also confused about the superiority of NAND flash technology to nor technology, because in most cases flash memory is used only to store a small amount of code, and nor flash memory is more appropriate. NAND is an ideal solution for high data storage densities. Nor is characterized by in-chip execution (XIP, execute in place) so that the application can run directly in Flash flash memory without having to read the code into the system RAM. Nor is highly cost effective in 1~4MB small capacity, but very low write and erase speeds greatly affect its performance, as well as its high transmission efficiency. The NAND structure provides very high cell density, high storage density, and fast write and erase speeds. The difficulty of applying NAND lies in the management of Flash and the need for special system interfaces.

Two Performance comparison
Flash Flash memory is non-volatile memory, can be called Block of memory unit block for Erasure and re-programming. The write operation of any flash device can only be done within an empty or erased unit, so in most cases the erase must be performed before the write operation. The erasure of NAND devices is straightforward, and nor does it require that all bits in the target block be written to 0 before erasing. Since the erase nor device is carried out in a 64~128kb block, the time to perform a write/erase operation is 5s, in contrast, the erasure of the NAND device is carried out in a 8~32kb block, and the same operation is performed for up to 4ms. The difference in block size when performing the erase further widens the performance gap between nor and NADN, and the statistics show that for a given set of writes (especially when updating small files), more erase operations must be done in the nor-based unit. This way, when choosing a storage solution, the designer must weigh the following factors.
The ☆nor reads faster than NAND;
☆nand write speed is much faster than nor.
☆ Most write operations require a wipe operation first;
The ☆nand erase unit is smaller and the corresponding erase circuit is less.

Three Interface differences
NOR Flash has an SRAM interface with enough address pins to be addressable, which makes it easy to access every byte inside of it. NAND devices use complex I/O ports to sequentially access data, and the methods of each product or vendor may vary. 8 pins are used to transmit control, address, and data information. NAND read and write operations take a 512-byte block, which is a bit like a hard drive to manage such operations, and it is natural that NAND-based storage can replace hard disks or other block devices.

Four Capacity and cost
NAND Flash unit sizes are almost half the size of nor devices, and because of the simpler production process, NAND structures can provide higher capacity within a given mold size and correspondingly lower prices. Nor Flash occupies the bulk of the 1~16MB flash market, while NAND flash is used only in 8~128MB products, which also shows that nor is it primarily used in code storage media, NAND is suitable for data storage, NAND in CompactFlash, The largest share of Secure Digital, PC cards and MMC memory cards is in the market.
Five Reliability and durability
One of the key issues to consider when using flahs media is reliability. Flash is a very suitable storage solution for systems that require extended MTBF. The reliability of nor and NAND can be compared from three aspects of longevity (durability), bit switching and bad block handling. Lifetime (durability) The maximum number of erase writes per block in the NAND flash is 1 million times, and nor is 100,000 times erased. In addition to the 10:1 block erase cycle advantage of NAND memory, the typical NAND block size is 8 times times smaller than nor, and each NAND memory block is removed less frequently within a given time. Bit switching all flash devices are affected by the phenomenon of bit switching. In some cases (rarely seen, NAND occurs more often than nor), a bit is reversed or reversed. One change may not be obvious, but if it happens on a critical file, this small glitch can lead to system downtime. If you just report a problem, read it a few times and it can be solved. Of course, if this bit really changes, then the error detection/error correction (EDC/ECC) algorithm must be used. Bit reversal issues are more common in NAND flash, NAND vendors recommend using NAND flash while using the EDC/ECC algorithm. This problem is not fatal when storing multimedia information in NAND. Of course, if you are using a local storage device to store operating systems, configuration files, or other sensitive information, you must use the EDC/ECC system to ensure reliability. Bad blocks in the NAND device are randomly distributed. There have been efforts to eliminate the bad block, but found that the yield is too low, the price is too high, it is not cost-effective. The NAND device requires an initial scan of the media to discover the bad block and mark the bad block as unavailable. In devices that have been made, failure to do so through a reliable method will result in high fault rates. Easy-to-use can be very straightforward to use nor-based flash, can be connected like other memory, and can be run directly on the code. NAND is much more complex due to the need for I/O interfaces. Access methods for various NAND devices vary by manufacturer. When using a NAND device, you must write to the driver before you can continue with other operations. Writing information to NAND devices requires considerable skill, as designers must never write to bad blocks, which means that virtual mapping is required throughout the NAND device.

Six Software support
When discussing software support, you should distinguish between basic read/write/erase operations and high-level software for disk emulation and flash management algorithms, including performance optimizations. No software support is required to run code on nor devices, and in the same operation on NAND devices, drivers are often required, i.e. memory technology drivers (MTD), and NAND and nor devices require MTD for both write and erase operations. There is a relatively small amount of MTD required to use nor devices, and many vendors offer more advanced software for nor devices, including the M-system TrueFFS driver, which is driven by Wind River System, Microsoft, QNX software Used by vendors such as System, Symbian, and Intel. The drive is also used to simulate and manage NAND flash for diskonchip products, including error correction, bad block handling, and loss balancing.

The difference between Nandflash and Norflash