The legendary evolution of MIPS architecture

2014-10-21 Imagination Tech

MIPS is a shining star in high efficiency, low-power CPU design principles and has been in the mobile and embedded industries for nearly 30 years. This article will quickly explore the evolution of the MIPS architecture and describe how it evolved from the earliest version of Stanford University's Computational Science lab to the current architecture.

MIPS-based processors can be found everywhere from micro-controller used in embedded systems to the cores used in data centers. The following video backtracking the roots of MIPS and demonstrates how the architecture evolves over time, continues reading after the pause, and finds milestones that define our processor technology.

It all started in the the 1980s, when the Stanford research team, including John L. Hennessy, decided to create a new set of instructions for the CPU to get the highest efficiency in the industry (such as functions relative to area and power consumption).

It still exists.

Soon after, they set up the MIPS computer systems company and released the first batch of commercial microprocessor architectures: MIPS I and MIPS II. The MIPS instruction set is rapidly becoming the benchmark of RISC, which focuses on the design principle of simplifying instruction set, providing higher performance with lower power consumption and smaller area. Many initial MIPS implementations aim at computer-class applications, such as workstations and servers. In recent years, MIPS CPUs have been sold to a large extent in embedded applications, including mobile platforms, wearable, home entertainment, networking, Internet of Things (IoT) and so on.

Enter the first 64-bit MIPS instruction set

The MIPS III instruction set, published in 1991, first added 64-bit integers and addresses. The MIPS IV and MIPS v instruction sets incorporate improved floating-point operations and a set of instructions to enhance the efficiency of generating code and data movement.

Two sets of instruction sets--mips32 and mips64--were released in 2002, marking the 32-bit and 64-bit MIPS CPUs being used more and more at the same time. The evolution of MIPS architecture

Up to now, the MIPS32 and MIPS64 architectures have significant performance, power, and area advantages over competitive processor architectures. These advantages stem from continuous progress in several principles: micro-architecture improvements, better integration at the system level, rapid introduction of lower-process nodes in the mobile domain, and astonishing evolution of operating system and compiler design. The MIPS32 architecture is based on the MIPS II instruction set, adding a handful of selected instructions in MIPS III, MIPS IV, and MIPS V to improve the efficiency of generating code and data movement.

The MIPS64 architecture is based on the MIPS v instruction set and is backward compatible with the MIPS32 architecture. In addition, each new MIPS instruction set is backward compatible with the previous generation instruction set, which runs through the evolution of two architectures. MIPS architecture also includes 32-bit and 64-bit versions

The MIPS32 and MIPS64 architectures are also used to address the high performance and low power requirements of a wide range of cost-sensitive applications.

The advantages of MIPS architecture

System Designers who choose MIPS can gain a flexible architecture that supports a wide range of operating systems and kernel software. Most importantly, MIPS32 and MIPS64 include options for adding optional components: Infrastructure modules, MIPS, application-specific extensions (ASE), user-defined directives (UDI), and custom processors that address the specific needs of a particular market.

The flexibility of architecture and the ease of use of MIPS architecture programming contribute to a vibrant partner ecosystem, creating a complete tool and software chain around the hardware IP. In addition, the MIPS CPU is the perfect processor for running Android, different Linux distributions, and many real-time operating systems (RTOS). Google, for example, recently announced that MIPS64 is one of three major architectures for acquiring Android L. This version of the operating system enables art--to have a new Android runtime environment that promotes application performance-running on the MIPS CPU.

Conclusion

The evolution of the CPU architecture is a dynamic process that requires simultaneous consideration of the need to provide a stable implementation platform, as well as new capabilities for new markets and application areas. Qualified promotion needs to have the following characteristics:

• Can be applied to diversified markets
• Provide long-term gain
• Maintenance of schema Extensibility
• Standardization to prevent fragmentation
• is a superset of the current architecture

For more information about MIPS, please visit our product page www.imgtec.com/mips. If you are a developer, please review our community website community.imgtec.com/developers/mips for a wide range of available resources and free training materials.