The principle and implementation of LPC1752 reading fm25l04b

Source: Internet
Author: User

    1. The LPC1752 communicates with the fm25l04b via SPI.

      Figure 1 LPC1752 and fm25l04b hardware wiring diagram

    2. Initializing the LPC1752 SSP0 module
      Follow the steps below to initialize the operation:

      • In the PCONP register PCSSP0, the power output of the SSP0 module is allowed;
      • Select Pclk_sel0 in the PCLK_SSP1 register, set the SSP0 clock to CCLK/4, divide the SSP0 clock, and set to CCLK/4/10;
      • The pin of the LPC1752 is set;
      • To set the SPI Master mode, the FM25L04 works in SPI mode 0.

      Initialization code:

voidLpc17xx_spi_init (void) {volatile uint32_t dummy; Dummy=Dummy/ * Avoid warning * /Lpc_sc -Pconp|=(1 <<  +);/ * Enable power to SSPI0 block * /    / * PCLK_SSP0=CCLK * /Lpc_sc -PCLKSEL1&=~(3<<Ten);/* PCLKSP0 = CCLK/4 (25MHz) */Lpc_sc -PCLKSEL1|=(1<<Ten);/* PCLKSP0 = CCLK (100MHz) */Lpc17xx_spi_setspeed (Spi_speed_10mhz); Lpc_gpio0 -Fiodir|=(1<< -);/ * P0.16 CS is output * /    / * P0.15 SCK, P0.17 miso, P0.18 MOSI is SSP pins. * /Lpc_pincon -PINSEL0&=~( (2Ul<< -) );/ * P0.15 cleared * /Lpc_pincon -PINSEL1&=~( (2<<2)|(2<<4) );/ * P0.17, P0.18 cleared * /Lpc_pincon -PINSEL0|=( (2Ul<< -) );/ * P0.15 SCK0 * /Lpc_pincon -PINSEL1|=( (2<<2)|(2<<4) );/ * P0.17 MISO0 P0.18 MOSI0 * /Lpc_ssp0 -CR0=(7<<0);/ * 8Bit, cpol=0, cpha=0 * /Lpc_ssp0 -CR1=(1<<1);/ * SSP0 Enable, Master * /    / * Wait for busy gone * /     while(lpc_ssp0 -SR&(1 <<SSPSR_BSY));/ * Drain SPI RX FIFO * /     while(lpc_ssp0 -SR&(1 <<Sspsr_rne)) {Dummy=Lpc_ssp0 -DR; }}
    1. Read fm25l04b

      FM25L04B Reading Timing
uint8_tFm25l04b_read(uint32_tDst, uint8_t*RCVBUFPT, uint32_tNbyte) {uint8_t addr_a8; uint32_t i =0;//  if((Dst+Nbyte>max_addr)|| (Nbyte==0))return(ERROR); Addr_a8 = (Dst&0xffffff00) >>5;Spi_flash_wp_unlock();Spi_flash_cs_low();Fm25l04b_readwritebyte(Read_cmd|ADDR_A8);Fm25l04b_readwritebyte(Dst&0x00ff); for(i =0; I <Nbyte; i++) {RCVBUFPT[I] =Fm25l04b_readwritebyte(0xFF); }Spi_flash_cs_high();Spi_flash_wp_lock();return 0;}
    1. Write fm25l04b

      FM25L04B's Write timing
uint8_t Fm25l04b_write (uint32_t Dst, uint8_t* sndbufpt,uint32_t nbyte) {uint8_t addr_a8; uint8_t temp =0, Statrgval =0; uint32_t i =0;//if (((Dst+nbyte-1 > max_addr) | | (Nbyte = = 0)))//  {//return (ERROR); /* ?????? *///  }Addr_a8 = (Dst &0xffffff00) >>5;    Spi_flash_wp_unlock ();                  Spi_flash_cs_low ();                                  Fm25l04b_readwritebyte (Rdsr_cmd); temp = Fm25l04b_readwritebyte (0xFF); Spi_flash_cs_high (); for(i =0; i < Nbyte;             i++) {spi_flash_cs_low ();           Fm25l04b_readwritebyte (Wren_cmd);            Spi_flash_cs_high ();                         Spi_flash_cs_low ();                           Fm25l04b_readwritebyte (WRITE_CMD|ADDR_A8); Fm25l04b_readwritebyte (dst+i) &0x00ff);                        Fm25l04b_readwritebyte (Sndbufpt[i]); Spi_flash_cs_high (); Do{Spi_flash_cs_low ();                                  Fm25l04b_readwritebyte (Rdsr_cmd); Statrgval = Fm25l04b_readwritebyte (0xFF);                                    Spi_flash_cs_high (); } while(Statrgval = =0x03);                  } spi_flash_cs_low ();                                                  Fm25l04b_readwritebyte (Wren_cmd);                Spi_flash_cs_high ();                 Spi_flash_cs_low ();                                 Fm25l04b_readwritebyte (Wrsr_cmd);                                Fm25l04b_readwritebyte (temp);    Spi_flash_cs_high (); Spi_flash_wp_lock ();return 0;}
    1. Test code
uint8_t recv_buf[16 ];uint8_t send_buf[ 16 ] = {0x01 , 0x02 , 0x05 , 0xe4 }; int  Main (void ) {systeminit (); Lpc17xx_spi_init (); Fm25l04b_read (0x0 , Recv_buf, sizeof  (RECV_BUF) ); Fm25l04b_write (0x0 , Send_buf, sizeof  (Send_buf )); memset  (Recv_buf,0 , sizeof  (RECV_BUF)); Fm25l04b_read (0x0 , Recv_buf, sizeof  (RECV_BUF) ); while  (1 );} 

LPC1752 Read fm25l04b principle and implementation

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