The simple makefile of the wording

A project under a lot of files, if a single input, more laborious, so you need to write the compilation process into a makefile file.

5 files, 3 cxx files, 2 hxx header files are created below

FileName main.cxx#include<iostream> #include "printf1.hxx" #include "printf2.hxx" using namespace Std;int main ( void) {  cout<< "Hello world!" <<endl;  PRINTF1 ();   PRINTF2 ();  return 0;}

FileName printf1.cxx#include "printf1.hxx" #include <iostream>using namespace Std;void printf1 () {    cout << "PRINTF1" <<ENDL;}

FileName printf2.cxx#include "printf2.hxx" #include <iostream>using namespace Std;void printf2 () {        cout << "PRINTF2" <<ENDL;}

FileName printf1.hxx#ifndef _printf_1_h_#define _printf_1_h_void printf1 (); #endif

FileName printf2.hxx#ifndef _printf_2_h_#define _printf_2_h_void printf2 (); #endif

Content of Makefile:

CC=G++EXE=MAINOBJ=MAIN.O printf1.o printf2.o$ (EXE): $ (obj) $ (cc)-o $ (EXE) $ (obj) main.o:main.cxx$ (cc)-C main.cxxprintf1.o:printf1.cxx$ (CC)-C printf1.cxxprintf2.o:printf2.cxx$ (CC)-C printf2.cxx

. PHONY:CLEANCLEAN:RM-RF *.O Main

where cc=g++

Exe=main

OBJ=MAIN.OPRINTF1.O PRINTF2.O

For the definition of a variable, $ (...) As a reference, you can analyze it, is it the same as the single action above?

Execution process:

$ make

g++-C Main.cxx

g++-C Printf1.cxx

g++-C Printf2.cxx

g++-o main main.o printf1.o printf2.o

Let's take a look at the rules of Makefile:

Target ... : Prerequisites ...

Comand

...

...

Target is the destination file, which can be either an object or an executable file, or a label (lable).

Prerequisites is the file or destination that is required to generate the target file.

command is the order that make must execute.

This is a file dependency, meaning that one or more target files depend on the file in prerequisites, which is the "cryptic rule" of make. Its build rule is defined in the command.

White point is that if more than one file in the prerequisites is newer than the target file, command-defined commands are executed.

This is the rule of Makefile. This is the core content of Makefile.

. Phony means that clean is a "pseudo-target". and a small minus sign in front of the RM command means that some files may be in trouble, but don't worry, keep doing what's behind.

Of course, clean rules do not put in the beginning of the file, otherwise, it will become the default goal of make, I believe that no one is willing to do so.

The unwritten rule is that "clean is always at the end of the file."

　

　

　

　　

　　

The simple makefile of the wording