The theory of computer underlying principle (vernacular)

Briefly explain the reason for writing this article. First of all, this is not the type of teaching, is I java really learn, because a lot of computer underlying principles are not very clear, every time learning new things because I do not understand the underlying principle of confusion, so determined to stop learning Java new things, began to understand the bottom. At the beginning of the so-called bottom is "Java Virtual machine", and then C language assembler What, in fact, want to figure fast, as soon as possible to get close to doing things now. Later found no, this is not fast, so simply from the physical level with the wire bulb integrated chip began to do a CPU start. In fact, not long, about three months, from the "zero-based self-made CPU" series of learning articles before I can also see the start time. After the CPU is done (in fact later because of the burn all kinds of circuits did not finish), began to look at the operating system, now just start to see a little. Summing up is what I think the learning route should be:

　　Self-made cpu--microcomputer principle--simple data structure and algorithm--computer composing principle--assembly language-- operating system --c language--compiling principle--complex data structure and algorithm--computer network--Java-- Java Virtual machine--source code research--Multi-threaded Linux high concurrency Spring load balancing a variety of these to judge a person Java level of things ...

　　I think Java should be in such a faraway place, and many people start with it. I now have a rough view of the operating system , of course, constantly fill in the previous knowledge. This article would like to take this opportunity to talk to you about the understanding of the bottom of the computer, the knowledge is very broken, everyone by the way to help me pick the wrong, if it helps you it is better. I said with plain English , think of where to say, it is easier to show the loopholes and errors, I hope you in the comments area actively spit groove ~

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A CPU is a piece of stuff that is connected by a bunch of wires, and each part is connected by a bunch of wires and a smaller set of parts. Think of the whole CPU as a component, and it's connected to the RAM, the disk and other peripherals with a bunch of wires, and I feel like a baby. Then each component from the outside is exposed to a bunch of pins, can be connected with a wire, to send them either high or low level of the current, you like the following 74ls173 (3-state output 4-bit D-type register ), Simply put is a can save 4 bits of data, can be used to do register.

　　

Looking at so many points, I feel that there are three kinds of understanding on the line, regardless of they are data input, data output, signal control what, they are a kind, anyway to give them either high or low electrical signals. Another category is the VCC and GND of the Connect + connect, which is designed to make the part "electricity". There is a clock, which you give him a high will be low back and forth to change the electrical signal on the line, the purpose is generally to let it rise along the time when this part "trigger" what effect, for this register, is to save a data or read out the data, of course, some parts do not need a clock signal.

The CPU and the other devices associated with it are all part of a "widget", which, regardless of how complicated it is, eventually exposes a clock, a negative connection, and a bunch of other messy pins. Some parts used to store things, some used to do operations such as Adder, and some used to count such as program counters, and some parts used to do a variety of translation ah what, such as address decoding something. Eventually they're all connected to a big boss. That is the clock signal generator, anyway it is the function of the special fast output a high and low level of the electrical signal to convert back and forth. So now I summed up the CPU is a boss clock signal, a bunch of little brother parts, a bunch of wires to the parts regularly connected to a piece, and eventually connected to the big boss.

So how does a bunch of parts work? First part is the program counter PC, it is the clock signal constantly accumulate, the output of the pin from the 0000,0001,0002 has been added. Of course you can have a clock cycle (that is, the high and low level) on the + 1, but so unless you have other parts of a clock cycle can be executed in a single instruction, generally not, how to do, then a counter, such as only from 0 to 5. This counter every time starting from 0, and then not to 5 before the program counter of a state pin into a "no trigger plus" state, so that the program counter is not changed. The components are then executed within 5 clock cycles, and then the program counter is incremented by 1. This is a single instruction cycle, with each instruction being executed with 5 clock cycles. Of course this is not good, you can change, let this counter from 0 to a dynamic value, this value according to the instruction type change, this is the multi-instruction cycle. Then the program counter has been added to the top is not good, give him a few pins, and then get a state, you can directly set a new value, this implementation of the program to jump. An instruction cycle can be changed dynamically, and you can force the value of the program counter to be set, which is almost enough.

The second part is the register heap , in fact, is a place to store things, with the memory of the hard disk ah, just near the CPU, the light with the distance divided by the current flow rate can be explained that it is relatively fast. So some of the intermediate results of the operation, even I read out in memory to do the addition or to write the memory of the data are placed in the register first. Register all the same you save any line, but in order to unify, do not a person like, the register to get some special functions, address data put your address data that stored register, the state of the data is placed in your state of the register, only this. Register is because there are different people to give it the definition of trouble, such as the IO interface port, is the register, just like a hard disk interface, you go to its port 3rd to write a 011101 what, he said you want to read the data, and then the hard disk to put the data into the 4th register waiting for you to read.

The third part is the arithmetic logic single , you can first assume that it is only a part of the addition, 8 pin data 1, 8 pin data 2, and then 8 pins to indicate the sum of the two data, and finished.

Fourth Part I don't want to call it the control unit , I feel I first confused is because of this name, I feel it is more like a way of wiring, but the abstract to say that the high, more easily written textbooks. Simply said is a few pin receive instruction, the other several pins output a variety of different high and low level signal, connected to the other parts of the pin play some control role. You like me to enter a "write memory" instruction, then I output the pin must be connected to the memory of the "write" this pin, this does not control it.

Summing up, in fact, the parts are just a few, storage parts : Register ah, RAM rom yes; control Parts : That is, the control of all parts. They can be read and writable to add this logic; arithmetic parts : mathematical operations; Engine Parts : This I named engine parts, is the clock signal generation, as well as the program counters, these are the whole part of the activation, the sense of launching, without them will not be the source of power. Peripheral Parts : can also be called IO parts, note Do not understand the hard disk as a storage part, it is the same as the network, mouse, keyboard is the same, are IO, you can read data from the disk, you can read data from the keyboard, when they are connected to the IO interface, are all considered the same thing.

I take the keyboard For example, no matter who produced the keyboard, will be connected to me a call "keyboard interface" thing, this keyboard interface has 5 ports, 1th No. 2nd No. 3rd No. 4th number 5th, is actually register, interface above the register is called Port . I this keyboard manufacturer can write a manual, tell everyone you listen well, port 1th is my key data, I press A in the keyboard, I went to the 1th port to write 00100011, your CPU read how to deal with I don't care. Of course, I am very kind, I give you port 2nd also make a data, for 0 when I did not press the button, for 1 when I press the button, this is enough to do it. This time the CPU can be processed, I read this port 2nd data, as I read the memory data, read I found it is 1, then I know the keyboard button, I continue to read Port 1th data, and then the various processing finally to a bunch of ports in the display interface to write a bunch of weird data, The monitor reads this data and then does a bunch of processing and finally lights up a few light bulbs on the screen. This inside the CPU constantly read port 2nd to see if the keyboard operation is called by polling the IO way to check the device, read the data of Port 1th to do a variety of processing eventually to the display interface to write data, is the driver . The last time the monitor reads the data to the screen, that's the physical details of the other device, and there's a CPU thing like ours that doesn't go scrutiny.

Perfect, but the above process has some problems, if the IO device is many, the way to poll IO is inefficient, it is best to actively notify the CPU when IO action. That can do, such as the keyboard has action, I am not to my port 2nd to write data, but to your CPU in a register to write a number, the CPU read this register has data, by checking its number to find the corresponding driver memory address, execute this program. This process is called interruption , and the query number to find the program, called the interrupt vector table . In fact, I really do not want to call it interrupted, because again this word puzzled me for a long time. Because the CPU is specifically detected by adding a clock cycle to whether there is an interrupt signal generation, that is, if there is no interrupt signal, this clock cycle also need to run once. So you see, from a more physical clock-cycle level, the interrupt mode is still polling, except that the polling unit is not an instruction, but a clock .

That's perfect, but there's a problem with that, like a keyboard, because it does need to execute a special driver to complete the function. But want to disk this, pure is to read the data write to memory or read memory data write to disk, this operation is very low but time consuming, if each time is through interrupt and then the data through the CPU first upload to the register in the memory, then let the CPU is too overqualified. This repetitive and time-consuming labor, it is best not to occupy the CPU, directly from the hard disk through a device to memory, this device is called the IO Controller DMA. When the hard disk receives a read request from the CPU, it sends a request signal to the DMA. DMA completes the memory operation from the hard disk, and then send an interrupt signal to the CPU, simple execution of the data processing of the interrupt program on the line, as for the data transfer process, the CPU can do other more advanced things.

Perfect, but there are some problems above, that is, although you do not occupy my CPU time, but you occupy the bus Ah, we are a common bus transmission data, when you transmit data occupy the bus, my CPU will not be accounted for. Or you wait for me when the CPU does not use the bus when you are re-using, this is called the DMA clock cycle stealing . But it's not good, I want you to be as far away from me as possible, do not occupy my CPU time also do not occupy my place, let a special one can execute simple command of the device and you have a separate bus to do this thing, I call the low version of the CPU, he is the IO channel .

　　

Say the IO port address problem, how the CPU specifies a port, you can use one part to represent the address, and the other is the IO address or memory address. Another way is to add an IO port to the memory-like address range, and then access a port with no difference in accessing a memory address. So the above to is the IO Port two address mode, the first is a separate address, the use of port mapping Io, the second is unified, using memory mapped IO, is now basically memory mapping. The whole IO this piece of skeleton is like this, you see just said interrupt Ah, DMA ah these, I think can be understood as the operating system, or due to the use of CPU demand of the product. Of course, all of this can be done with software, but when the requirements are large enough to allow the CPU to make some changes to the operating system, this is not the way the CPU was originally. In fact, the above mentioned interruption, is an external interruption , of course, can also be internal interruption , is to instruct themselves to start an interruption. This is based on the different points of the interrupt source . Of course, the essence is the same, is to a register or a few registers to write the number, CPU a clock cycle specifically to look at this register, and then check the interrupt vector table to find the corresponding program to execute, after the recovery of the PC before the resume continues.

The whole IO is almost like this skeleton, so you see why the operating system focus on Io, focus on memory management, focus on multiple , because nothing else to pay attention to, the CPU can do things too simple, so-called operating system, DMA these new hardware, There is no technical high-end thing, or at the bottom of the computer, the essence of high-end is complexity and trouble. You said that the study of the bottom of the people particularly high-end rather than that they know every detail sufficiently comprehensive, these pieces of knowledge tied together in itself is high-end technology, which also answered I wrote a long time ago, "What is technology". You include my first 74ls173 pin diagram, if you look at what I said "parts" Balabala understand, you can say you understand, of course, you have the CPU main components of the PIN diagram are read, remember and in the breadboard or welded plate, you can also say you understand. But this level is different, the so-called understanding is not deep, in fact, is the details.

Say memory address management, or address method , of course, you can represent an absolute address in the instruction, without any conversion directly into the memory or the corresponding device input the address signal and then read the data. You could make a new address by putting together two addresses. Or you can form a new address and then convert it in some way, or map it again. And so on, the operating system for memory management is these, all the details. I simply entered a door, the first CPU is the absolute address addressing, that is, the address in my instruction directly into a part of the address line. The first thing to do is 8086CPU, the originator CPU of the x86 architecture, which has 1 6-bit data lines, but has 20-bit address lines . Of course, you can use only 16-bit address lines. But at that time people think that the address is not enough, and then all kinds of reasons can not be made into 32-bit CPU, so when addressing a register as the segment address data, and the other as a segment internal address , in fact, forget so much, it should be to make up a 20-bit address, so that the scope of addressing is expanded. But this is a good design, isn't it? The United States and the name of the address and paragraph address, in fact, this is very troublesome, if the number of CPU bit enough to find this trouble, so that the subsequent 32-bit CPU in order to be compatible with the previous Pat forehead design, even if the address space is enough, but still use this way. But later said the operating system has become complex, forcing the CPU to make real mode and protection mode , each segment also has its own permissions ah length AH and so on various signs, such a register such a design abruptly become useful, pointing to a paragraph table The records data for these types of flags.

The length of the segment can be changed, so let's assume it's fixed size so that if I have a total memory capacity of 10 segments, and then my hard drive can hold 1000 segments, my table will record which of the 10 segments in my memory corresponds to which piece of data on the hard drive. And then, when I was programming, the address range was written as big as a hard disk, and then there was a special one that would use the MMU to translate the address in my program into an in-memory address, and if not, put the data of that address on the hard drive in memory and eventually translate it into an in-memory address. Here is the concept of virtual address , the address of my program is a virtual address , help me to look up the table to translate the device called MMU, the memory of the memory address is a physical address . Managing this virtual memory in segments is called segment memory management. Just the sauce.

The management benefit of the paragraph is flexible in length, the bad place is you like your A and C segment is a b segment, the size is 1000, now do not have to move out of this place, you new to a hard drive from the data, the size is 1001, is not very diaphragmatic people. Look at the right to put in just one, so you can only take the whole C-section forward Na. If the heart of the data is 900, the rest of the place can only be placed here, the remaining 100 is very embarrassing. This embarrassing 100 is called memory fragmentation . Depending on the angle, if you say this 100 is due to the 900 squeeze in the rest of the space, it is called internal debris , if you say this 100 too small new program can not put in, it is called external debris . This piece I think through paragraph called external page style called internal bad, I hope everyone to discuss under. In order to solve this problem, there is page management , the page is a concept, you would like to call him the same paragraph can be done. The hard disk is divided into a fixed-size physical page, the operating system logically on the page into the same amount of logical pages, and then there is a page table of things recorded the logical page and the corresponding relationship between the physical page, and then the same as a paragraph when the requested page is not in the page table, It is accurate to say that the page table in the flag of this page is not in memory, then the hard disk on the page redeployment, this process is called a fault. This page of course page has a good and bad, and then there is a meddling way is the section page management . In a word, everything is OK, now the operating system is basically a page, finished.

Say the part of the process , hey do not say, this piece is not even the introduction is not counted, completely do not understand the BB, stay in the next article.

In fact, the above from somewhere suddenly from the computer composition of the principle of the drawing wind into the operating system, the following simple to say why the operating system appears. Of course, at the beginning of the CPU and peripherals can do anything you want to do, you can completely manual way to the memory of an area to write code, then the program counter to make an initial value, electric one run up. But this is disgusting, so there is a card machine, and then a card machine read the program written in advance, so you do not have to manually operate the memory, you make good cards, it is convenient, anyway, but the essence of the same. This is called a manual operation system, or it can be called without an operating system. Later found that even the exact same job, still need to remove the pieces of paper and then put in, such as two cards 1 and 2, there is a program to perform 1122121 of this order, it is necessary to a person to play back and forth, this is not scientific. So with the batch operating system, people can first load 1 and 2 into memory, and then get a C card to call this 1 and 2 card, this is the dispatcher, can also be called Supervisory program. This is called a batch processing operating system . Then can alternately perform multiple tasks, a task encountered IO operation switch, this is called the Multi-Channel program system . But after a job is thrown into the user's control, no interaction, so there is a time- sharing operating system , you can have multiple terminals using the CPU through the command and get a response. However, if some special operations need to be immediately corresponding to the possible can not be done, so by introducing interrupts and strict interrupt time control to achieve the real-time operating system . And then it's our current operating system. In fact, I do not particularly understand these names and definitions, so you can find that I speak in fact quite chaotic, here also want to have big guy to give a good explanation.

Write this today, think of these days seem to learn a lot of things, but I wrote out to find that all the belly spit out on this point, no system is to think of where to write to the string as far as possible, after the work secretly slipped out of writing. Then there is the address of the data ah is a lot of examples, not accurate values, in order to facilitate understanding, mainly I do not want to spend time to make an accurate in such an article casually written, will be in some places specific to come out to say. I hope you guys give criticism or spit groove discussion, thank you very much!

　　

Computer underlying principles (vernacular)