Ti_dsp_srio-directio Operations-Basic knowledge

directio: The SRIO Directio transfer class is similar to a memcopy transfer between the SRIO devices. One of the devices is the master, that initiates the transfer. The second Deviceis the slave that responds to the Masters requests. The slave device application normallydoes not become aware of the access (accessed by the Salve DSP does not know that the Master DSP was initiated through Srio). The master must know the destination memoryaddress for running a directio transfer (master must know the access address of the salve side that he wants to access, that is, if Master wants to Write/read Salve end of the 0x80000000 address from the beginning of a number of bytes of data, you must know 0x80000000 this address).

The Direct IO mode can be further divided into the following transmission formats (each transfer mode has its own transmission packet):

1, Nwrite: normal write operation. You can write the number directly to the peer memory. A packet is up to 256bytes and does not require a receive-side response.

2, Nwrite_r: Nwrite with response (Nwrite with Response), requires receive-side response.

3, Swrite: Stream write, the data length must be an integer multiple of 8 bytes and does not require a receive-side response.

4, Nread: normal read operation. The number can be accessed directly from the peer. A packet with a maximum of 256bytes, that is, the master DSP to read the slave DSP memory data.

The above refers to Srio's direct IO package, in fact c66x DSP Srio package has direct IO packet, doorbell package, message package and maintenance package and so on. The most important of these is the direct IO packet and the doorbell packet Transmission control, for the direct IO packet and the doorbell package, its Transmission Control module is divided into LSU (Load/store Unit) control Unit and Mau (Memo-ry Access Unit) control units. LSU is used to send the direct IO packet, the doorbell packet, and the Mau to receive the direct IO packet.

The LSU unit is actually a series of registers, on the Msater side, the master DSP wants to access (read/write) the memory data of the slave-side DSP via Srio, master needs to configure the LSU register, the hardware will pack the contents of the register into the package (for example, when doing nwrite operation) , as the head of the package. The c66x DSP provides 8 sets of LSU for Directio data transmission, each LSU has 7 registers, when the fifth register is finished, the data is sent out, and the 6th register is used primarily to detect the current LSU state.

LSU Register (refer to Srio Guide 3.8 lsu/mau Registers)

The

Read-write operation and the doorbell operation are mainly controlled by the 7 registers in the figure above, and the values in these registers are automatically added to the package. On the Srio bus, each Srio device has a corresponding device address, which is like the ID of a srio device that distinguishes between different srio devices. When a Srio device on the Srio bus reads and writes access, the packet it sends contains the device address, and only the Srio device whose device address matches the packet's device address will respond to the transmission. The SRIO address MSB and SRIO address LSB collectively constitute 64-bit addressing, which indicates the address of the SRIO device being accessed. The 32-bit addressing is only used on the Development Board, so the SRIO address MSB indicates the addresses of the DSP being accessed for the 0,srio address LSB. The DSP address indicates the location of the local DSP, such as when the operation is Nwrite, the data at that address will be written to the slave DSP Srio address LSB addresses. Byte_count This gives the number of bytes transmitted, one read or write operation (can be many packets) can transmit up to 4Kbytes of data, can be divided into a number of packets for transmission, because the maximum size of payload per packet is 256 bytes. DestID is the ID number of the target device used to differentiate the device on the Srio bus. The DRBLL info is used for the doorbell event, which is set by this bit segment, resulting in an interrupt to the target DSP. The Packet type is used to indicate the types of this transfer, such as Nread, Nwrite, and doorbell.

For the DSP, after initializing the Srio, the master DSP can send the data to the slave DSP via Srio, but note that slave does not know when Master begins to send data, when master sends out the data, So normally master will automatically generate a doorbell (via doorbell message, or doorbell packet) information after the data transfer is complete, informing slave,master that the data has been sent, Slave Srio hardware receives doorbell messages, it can trigger an interrupt, which slave can process the data. Here the data is completed automatically trigger the mechanism of sending doorbell messages, also by setting the LSU register implementation, that is, when the lsu_reg3 drbll_val bit is set to 1 (Means:there is doorbell information which Needs to is sent out at the end of the packet), indicating that the Drbll_info value of LSU_REG5 is valid, so Drbll_info (16bit, The doorbell message payload only 16bit) is sent to the slave DSP via the doorbell packet.