TTL vs. CMOS level

  The no-load power consumption of the TTL gate circuit is larger than the static power consumption of the CMOS gate, which is approximately dozens of MW (MW) and the latter is only about dozens of NA (10-9) Watts, and TTL and CMOS gate circuits generate a large number of peak currents when the output potential jumps (from low to high or from high to low). Cause a large dynamic power consumption.
Speed
      It is generally assumed that the speed of the TTL gate is higher than the CMOS gate circuit. The main factors that affect the working speed of TTL gate circuit are the switching characteristics, the circuit structure and the internal resistor resistance values of the inner tube of the circuit. The higher the resistance value, the lower the working speed. The longer the switch time of the tube, the lower the working speed of the door. The speed of the door is mainly reflected in the output waveform with respect to the input waveform has a "transmission delay" TPD. The product of TPD and no-load power p is called "Velocity-Power product", as an important indicator of device performance, the smaller the value, the better the performance of the device (generally about dozens of skin (10-12) joules). Unlike the TTL gate circuit, the main factor that affects the working speed of the CMOS circuit is the outside of the circuit, that is, the load capacitance cl. CL is the main factor that affects the speed of the device. It is determined by CL that the transmission delay of the CMOS gate is about dozens of nanoseconds.

TTL vs. CMOS level (RPM)