Understanding and applying digital-to-analog converter

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Understanding and applying digital-to-analog converter
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A digital-to-analog converter (DAC) is a very common device with capabilities far beyond the range of level settings, it also extends to communication, video, audio, potentiometer and alternative variable resistors, signal synthesis, and many other applications.

 

Some technical indicators of DAC

 

DAC is the most basic and important module for building mixed signals. Its output can be either single-ended or differential, and the device can be single-polar or bipolar; the DAC transfer function is linear or non-linear. For example, 'logdac 'is a logarithm transfer function, which is mainly used in audio systems. The fitting degree between the actual transfer function and the ideal transfer function can be described by DAC's integral non-linearity or INL. there are usually two expressions: one is the endpoint method, as shown in the figure 1 on the left, the other method is the best straight line, as shown in the right figure. Even a simple Σ-△converter that does not present a non-differential nonlinear error has an INL error, and this error also affects the stray and distorted performance.

 

 

DAC can generate a quantified output level response to the input code and dynamically generate signals. Like ADC, DAC is also a sampling data system and follows the nequest and Shannon sampling theorem.

 

In addition, the creation time is a technical indicator of DAC design. It can be simply understood as the time from the output voltage to a level with a specified error range to a steady entry into the target error range. The build time defined by some manufacturers also includes the register latency related to the lock and switch setting time, and the left-side dead zone as shown in 2. The former is more useful when using DAC to generate dynamic signals, while the latter is very important for the adjustment of level settings. Time series indicators that do not meet the set time may cause performance problems.

 

 

DAC Architecture

 

A basic building module of DAC is a simple switch. Figure 3 shows the simplest voltage output DAC architecture, including a Kelvin divider, a thermometer DAC, and a full decoder. This DAC can also be called a resistance string DAC. As shown in the figure, a three-bit resistance string DAC is used. Generally, the resistance string DAC cannot exceed 8 bits. For the Kelvin partial-pressure DAC, the switch glitch generated by changing the input code is relatively constant and has nothing to do with the position of the Code within the DAC range, therefore, it has become a common construction module for segmented DAC with high resolution. The reference voltage is added to the top of the step Resistance string. The input code determines the connection between the switch and the resistance string. Due to the low leakage rate of the CMOS Switch and the high integration level, the resistance string DAC is usually made of CMOS.

 

If the top resistance of the resistance string DAC is removed from figure 3, the upper and lower ends of the trapezoid resistance string are changed to the two ends of the potentiometer to obtain the digital potentiometer, the output of the Resistance string DAC is the tap of the potentiometer.

 

 

DAC Based on the R/2R network has always been a common type. Because the ratio of 2 to 2 is very low, the resistance is very easy to manufacture and fine-tune, 4 shows a voltage type R/2R tiered network DAC. In this architecture, each binary bit switches between the ground and the reference voltage. one advantage is that the output impedance of this architecture is independent of the Code and is constant. The output can be a voltage or a current that flows into the virtual ground. Note that these switches must work within a large common-mode voltage range (from VREF to the ground potential), and the impedance of the VREF endpoint is a function that inputs a number of code, therefore, it must be driven with low impedance.

 

For the R/2R incremental DAC current-type output structure, the switch always works at the ground potential. Because this architecture uses the CMOS Switch, The VREF input can be positive or negative. If the bipolar AC input is added to the VREF pin, there is a 4-quadrant multiplication, so the output of the product between the VREF voltage and the digital amount code can be obtained, therefore, this DAC architecture is usually used in the multiplication DAC (MDAC) and can be applied to the amplification or reduction of signals in digital control mode.

 

 

If you replace the resistance or current source with a capacitive switch, that is, the switch capacitor DAC or charge distribution DAC, as shown in Figure 5. The capacitor matching is controlled by the precision optical technology. In addition, some fine-tuning capacitors and switches are added before leaving the factory, or used during system-level self-calibration debugging after installation. One disadvantage of this architecture is that the transient current at the switch is injected into the analog input end, which requires the driving amplifier to stabilize these transient currents within about half a switching period.

 

Several low-resolution DAC can use the 'segmentation (segmentation) 'technology group to Synthesize High-resolution DAC. There are many ways to implement this segmentation. As shown in (A) in section 6, two three-bit resistance string DAC constitute A complete 6-bit DAC. If the CMOS process is used, this DAC works well. The highest bit is implemented by the first resistance string DAC, while the lowest Bit is implemented by the second resistance string DAC. In Figure 6 (B), the low DAC is composed of binary DAC. The segmentation method reduces the impact of switch glitch and helps reduce the DNL error related to digital input. Therefore, it is often used in high-speed DAC.

 

 

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