Understanding of the process

Directory

Why does the concept of process occur

What is the impact of process switching

Which states need to be protected?

How do I save these states?

How to schedule a process

Clock interrupt

Interrupt re-entry

Why does the concept of process occur

If there is no concept of process, how is the program executed? It can only run one program, run a program, and then run the next. Even if the middle of the last program to wait for something 10 days and half a month, there is no way to do things.

What if there is the concept of a process? Then the operating system sees a process idle, it does not give the CPU to it, this is the concept of process switching. So CPU utilization comes up. At this point there is also a situation, if a process has been busy, is it possible that the other process can only be in the side waiting? It also stipulates that each process can be used for the maximum number of consecutive CPU time, to the time must be to others, this is called the process time slice.

And because of the emergence of the process, it may lead to a problem, a process crashes, we all play together. To prevent this from happening, Intel introduced the concept of protection mode. A process hangs up, giving the operating system an opportunity to clear the process, rather than perish with it.

In protected mode, Intel prescribes different privilege levels. Linux systems are available with 0 and 32 privileged levels. For the privilege level, see the processor features in protected mode that article. We have used three privileged, 0, 1, 3, more than Linux a 1 privilege level, this is because the author of the micro-kernel, for some of the system's function module gave 1 this privilege level, lower than the kernel, higher than the user process.

What is the impact of process switching

Different processes execute different code, and the same process has different privilege levels, which brings up the problem of stack switching. Because of different privileged levels, different processes, if a stack is shared, there is no guarantee that the stack will not be destroyed when it is cut back. So we have to protect the execution environment before switching.

What states need to be protected?

God to God, Satan to Satan. Process of course to the process itself.

Need a ledger again:

1. Record how much time is left for each process
2. Record each register that the process uses at this time, for example EIP,ESP these more important data, wait for the next time to switch back and then use
3. And then contact the file system, as well as an open file descriptor array
4. and the choice of the LDT in protected mode.
5. And a state of his own.
6. Process-Own code snippets and data segment descriptors

Is this the end of it? Certainly cannot consider thoroughly at once, only with the advancement of the work, our consideration can become more and more perfect.

So where are these things kept? If you keep it in one place, the system needs to make an extra record, since each process has a different record, and the required space is fixed, and will not be small for a while. In this case, it is best to put it in the process table, eliminating the extra records that the system has to do, and the process itself is very handy if you want to modify these values (for example, exec loads a new image).

How do I save these states?

The place to save is there, and it seems that it should be able to switch. Let's look at several switching modes.

1. Switch from kernel state to user state
2. Switch from kernel State of one process to kernel state of another process
3. Cut from user state to kernel state

The first two states are better handled, all in accordance with the Register in the process table in order to pop up.

Just a bit of a hassle from the user state to the kernel, because you can't access the kernel-state data when the user is configured, so how do you know where your process table is? Then the user-state execution environment cannot be saved.

Intel has supported hardware. TSS segments are required to switch from the user state to the kernel state. When a signal is switched from the user state to the kernel state, the CPU will temporarily save SS, esp in the CPU, and then get the selector from the TR register, and get the subgrade address of the TSS from the GDT, The TSS.SS0 is then given to the SS register, TSS.ESP0 to the ESP register, which is equivalent to the stack pointer switching from the user state to the kernel state. Then save the SS, esp plus Eflag, CS, Eip on the esp0 point to the stack.

This requires that when the process leaves the kernel state back to the user state, the value of SS0 and Esp0 in the TSS segment must be set to the start address of the user execution environment in the process table.

The scene of the protection process seems to have led to a lot of things. GDT, LDT, TSS. In fact, they are a table in memory. There are instructions on the Internet.

Talk about the details of the LDT addressing that you were prone to ignore before.

When Ti=1 indicates that the segment descriptor is in the LDT:

1. Get the GDT base address from the GDTR register first.
2. Gets the position index (LDTR high 13-bit) of the section of the LDT from the LDTR register. While the content of LDTR is loaded with Lldt, this time it is clear that the code in the return from the kernel when the process to load the respective LDT selector.
3. In this position index the LDT segment descriptor is obtained in the GDT to obtain the base address of the LDT section. The LDT table is present as a segment. From this we can see that the GDT is the total directory, and everyone must be addressed as a starting point.
4. Use the segment selector high 13-bit position index value to get the segment descriptor from the LDT segment. (This is a segment selector, usually CS)
5. Paragraph description character contains the base address of the segment, the limit length, priority, and other properties, this will get the beginning of the segment (base), and then add the base address of the offset yyyyyyyy to get the last linear address. (CPU to complete)

It seems that the process of this worthy of the text of the knowledge point really there is nothing to say.

It is no wonder that great things seem to be simple.

How to schedule a process

What about the timing of the process switching? You can't let the process decide for yourself when you're not using the CPU? What if there's a rogue?

Clock interrupt

At this time, the interruption is a very good arbiter, relying on physical characteristics, on time and punctual timekeeping. The system only needs to do some calculations when the quartz crystal is telling the time.

In the clock interrupt, we can judge whether the current process is running out of time slices, and the system chooses a process from the prepared process queue to execute. Of course, the process of selection can be simple or complex, see what the realization wants to do. At present, we have to do a relatively simple, each process allocated some time slices, each time the clock interrupt the current process of the time slice minus 1, equal to 0, the system took off the use of the CPU, let the next process using the CPU.

Interrupt re-entry

Clock interrupt is relatively simple, set 8259A can respond to the interrupt signal. But in the book, the author also let me understand the concept of breaking re-entry. When I looked at Linux 0.12, there was no re-entry in the clock interrupt code.

Take a look at what happens when a CPU response is interrupted:

After the CPU response is interrupted, the output interrupts the response signal, automatically presses the contents of the status flag register into the stack to protect it, and then zeros the interrupt flag bit in the status flag register with the trap flag bit TF to automatically turn off the external hardware interrupt. Because the CPU has just entered the interrupt to protect the scene, mainly involved in the stack operation, at this time can no longer respond to interruptions, otherwise it will cause system confusion.

The example given in the book is that the interrupt is opened with the STI command after the register is saved, so the interrupt is allowed, and there is no additional processing after the outage in Linux 0.12, so ignore the interrupted re-entry.

It is not difficult to handle interrupt re-entry, you need to define a global variable and initialize it to-1. Enter the interrupt to add 1 to this variable, if the result of this calculation is not equal to 0, it is a re-entry interrupt, the immediate end of this interruption.

Understanding of the process