Variables and Macros 1

Transfer from http://blog.csdn.net/todd911/article/details/43493847

Make consists of two languages. The first language is used to describe the dependency graph of work and necessary conditions. The second language is the macro language, which is used for text substitution. Like

C Preprocessor, M4, and macro assembler.

A variable name can be claimed almost by any character. Include most of the punctuation, even if the space can be used, but should avoid doing so. In fact, only:

, #和 = characters are not allowed in the variable name.

Variable names are case-sensitive. To get the value of a variable, use $ () to enclose the name of the variable, with a special case: If the variable name is a single letter

You can omit parentheses, so use $letter directly.

You can also use curly braces to extend variables, such as ${CC}. Modern makefile mostly use the brackets.

When a variable is used to represent a constant defined by the user on the command line or in the environment, it is customary to write its name in uppercase, separated by an underscore symbol between the words.

For variables that appear only in the makefile file, the names are all written in lowercase, and the words are separated by an underscore symbol. Finally, it contains user-defined

The variables of the function and the macros are written in lowercase to their names, and the words are separated by dashes.

#常数

CC: = gcc

MKDIR: = Mkdir-p

#内部变量

Sources = *.c

Objects = $ (subst. c,.o,$ (sources))

#函数

Maybe-make-dir = $ (if $ (wildcard $), $ (MKDIR) $)

1. Types of variables

There are two types of make variables: simple extended variables and recursively extended variables

You can use the: = Assignment operation to define a simple extended variable:

Make_depend: = $ (CC)-M

This variable is called a simple extension because, once make is read into the variable's definition statement from Makefile, the right part of the assignment operator is immediately extended.

The right part of the assignment operator is extended whenever a reference to the make variable appears, and the resulting text is stored as the value of the variable. This behavior is in keeping with

Most programs and scripting languages are the same. For example, when this variable is expanded, it will generally become the following:

Gcc-m

However, if the above CC variable has not yet been defined, this variable is typically expanded to look like this:

<space> m

The second variable type is known as a recursive extended variable. You can use the = assignment operator to define a recursive extended variable:

Make_depend = $ (CC)-M

This variable is said to be recursively extended because make only reads the part to the right of the assignment operator and stores it as the value of the variable, but does not perform any

Extended action, the extended action is deferred until the variable is used, and it may be appropriate to refer to this variable as a variable that extends the extension. Because the extended action

is deferred until the variable is actually used.

Make_depend = $ (CC)-M

...

#稍后

CC = gcc

Thus, when make_depend is used, even if CC is not defined, the value of make_depend in the script is expanded to gcc-m.

2. Other assignment types

Make also provides two additional assignment operators:? = and + =.

The = operator is called a variable assignment operator that is conditionally attached. This operator only makes the action that the variable requires to be assigned if the value of the variable does not already exist.

#将所产生的每个文件放到 $ (project_dir)/out directory.

Output_dir = $ (project_dir)/out

We will only assign a value to the output directory variable Output_dir if it does not already exist.

The + = operator is often referred to as the attachment operator, which attaches text to a variable and adds an additional action to a simple variable, and the + = operator can be implemented

Into this:

Simple: = $ (simple) New stuff

But recursive variables can cause a problem, which is not allowed if the + = operator is implemented as follows.

Recursive = $ (recursive) new stuff

This is a mistake because make has no way to handle it properly. If make is stored recursive the current definition plus new stuff, make cannot

The runtime expands it again. Attempting to extend a self-referencing recursive variable will result in an infinite loop.

So, + = is specifically implemented to append text to the recursive variable and do the right thing.

3. Macros

Variables are suitable for storing values in single-line form, and for multi-row values, such as command scripting, what if we want to execute it in a different place? For example

The following sequence of commands:

EHCO create [email protected]

$ (RM) $ (tmp_dir)

$ (MKDIR) $ (tmp_dir)

$ (CC) main.c

$ (RM) $ (tmp_dir)

In GNU make, we can create a macro through the Define directive, where the macro is just another way to define a variable that can also contain

The inner displacement line symbol.

Define Create-obj

@echo Create [email protected]

$ (RM) $ (tmp_dir)

$ (MKDIR) $ (tmp_dir)

$ (CC) main.c

$ (RM) $ (tmp_dir)

Endef

The Define directive follows the variable name and a newline symbol. The body of the variable contains all the command sequences until the ENDEF keyword appears, and the ENDEF keyword

Must be on its own line. A variable created by define, like any other side, will be extended many times, unless it is used in the context of a command script

, the following are examples of how macros are used:

$ (Ui-obj): $ (ui-classes)

$ (create-obj)

Notice that we have an @ character in front of the echo command, and when we execute the command script, the command line with the front @ character is not output by make, so when we run

Make, it does not output the echo command itself, only outputs the output of the command, and if the @ prefix is used inside the macro, the prefix character only affects the

Command line. However, if you use this prefix on a macro reference, the entire macro body will be hidden:

$ (Ui-obj): $ (ui-classes)

@$ (Create-obj)

When make runs, it only displays:

$make

Create Ui-obj ...

Variables and Macros 1