What is the Chinese meaning of the parameters in the BIOS?

Above1mbmemorytest: Set whether to detect more than 1M of memory at post. This option has been eliminated in the new BIOS. As memory prices plummeted, computer users installed memory capacity of the sudden increase in the power-on when the bulk memory self-test time is too long, in the future, even if the memory test may also appear allow/prohibit switch.

Autoconfiguration: When set to allow, the BIOS is set in the best state. The BIOS can automatically set memory timing, so some modifications to the memory settings are prohibited, and it is recommended that you choose the allowed method.

Memorytestticksound: Whether to emit a click sound for a memory self-test. If you're bored with it, you can turn them off.

Memoryparityerrorcheck: Sets whether to set the memory parity. More in the 30-line memory use ERA, has been eliminated. However, forcing the non parity memory to the parity setting will cause the computer to fail to boot.

Cachememorycontroller: Whether to use caching. Not used in the popular Awardbios.

Shadowramoption: Set the system BIOS or display card BIOS to map to normal memory. Can speed up, but may also cause a panic.

Internalcachememory: Whether to use CPU internal caching (first-level caching). can improve system performance.

Externalcachememory: Whether to use the CPU external cache (level two cache on the motherboard). can improve system performance. The advent of AMD's new CPU with level two caching has relegated the two-level cache on the motherboard to a three-level cache.

Concurrentrefresh: Literal translation is a simultaneous refresh. Setting the CPU to refresh the memory at the same time for other I/O operations can improve system performance.

Dramreadwaitstate: Sets the waiting clock cycle for the CPU to read data from memory. More waits can be set when memory is slower than the CPU.

Dramwritewaitstate: Sets the wait clock cycle when the CPU writes data to memory. More waits can be set when memory is slower than the CPU.

Slowrefresh: For good quality memory, keep the data for a long time, you can set a longer time period, thereby improving system performance.

Shadowcachecable: Adds cache to the biosrom that maps to conventional memory, making performance a step further.

Pagemode: Makes the memory work in Pagemode or pageinterleaved mode.

Rastimeoutcounter: Make Pagemode or pageinterleaved mode work faster. Because it is possible to exceed the memory RAS cycle, a counter is used to monitor the RAS cycle and, once the RAS cycle is exceeded, the cycle is automatically reset to 0.

Memoryrelocation: Memory relocation. 384 of the upper memory (uppermemoryblock) data is dumped into extended memory above 1MB.

Memoryhole: Someone called a memory hole. The area where the memory address is 15MB-16MB is left to some special ISA expansion cards to speed up or avoid collisions with the card. is generally set to prohibit unless the ISA expansion card has a specific description.

Drmatimingsetting: Fast page memory or Edo memory speed setting, usually 60ns or 70ns selection, invalid for 10ns or faster SDRAM memory.

Fastmatorasdelay: Sets the latency between the memory address (memoryaddress) and the Memory line address trigger (RAS).

Dramwritebrusttiming:cpu writes data such as caching, and then writes the delay time of memory.

Fastrastocasdelay: The delay time between the line address trigger signal to the column address trigger signal. Usually the ras# drops down to cas# between the time.

Dramlead-offtiming:cpu the time before the read/write memory.

Dramspeculativeread: When set to allow, read memory time than normal time in advance a time period, can improve system performance.

Dramdataintegritymode: Select the memory check mode is parity or ECC.

Refreshrasassertion: Set the memory row address refresh time period, the good quality of memory can be delayed refresh, thereby improving system performance.

Rasrechargeperiod: The amount of time required to recharge a memory line address signal.

Fastedopathselect: Set a fast way to Edo memory read/write to improve system performance.

Sdramraslatency: Sets the time delay that the row address of the SDRAM memory triggers to the column address trigger.

Sdramrastiming: Sets the system's row address trigger time for SDRAM memory, or refresh time.

Peerconcurrency: In order to improve the system parallelism, so that the CPU on the cache or memory or PCI devices, or PCI main signal to the PCI peripherals and so on. The higher the system intelligence, the more operations are done in parallel with the CPU, the more performance is improved.