What is the difference between DDR3 and DDR2?

Source: Internet
Author: User
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1. Burst Length (BURSTLENGTH,BL)

Due to the DDR3 8bit, the burst transmission cycle (BURSTLENGTH,BL) is also fixed to 8, and for DDR2 and early DDR architecture system, BL=4 is also commonly used, DDR3 to add a 4bitBurstChop (sudden mutation) mode, That is, a bl=4 read operation combined with a bl=4 write operation to synthesize a bl=8 data burst transmission, then can control this burst mode by A12 address line. It should also be noted that any burst operation will be prohibited in DDR3 memory and is not supported, and replaced by more flexible burst control (such as 4bit sequential bursts).

2. Addressing sequence (Timing)

Just as the number of delay periods increases as the DDR2 from the DDR transition, the CL cycle of DDR3 will also improve compared to DDR2. The CL range of DDR2 is generally between 2~5, while DDR3 is between 5~11, and the design of additional delay (AL) is also changed. The range of Al at DDR2 was 0~4, while the DDR3 had three options, namely, 0, CL-1 and CL-2. In addition, DDR3 also adds a new timing parameter-write delay (CWD), which is based on the specific frequency of the work.

3.DDR3 new Reset (reset) feature

Resetting is an important new feature of DDR3, and a pin is specially prepared for this purpose. The DRAM industry has long demanded that this feature be added, and now it is finally implemented on the DDR3. This pin will make the initialization of the DDR3 easier. When the reset command is in effect, the DDR3 memory stops all operations and switches to the smallest active state to conserve power.

During reset, DDR3 memory will shut down most of the intrinsic functions, all data receivers and senders will be closed, all internal programs will be reset, DLL (delayed PLL) and clock circuits will stop working and ignore any movement on the bus. This will enable DDR3 to achieve the most energy-saving purposes.

4.DDR3 New ZQ Calibration function

The ZQ is also a new foot, with a 240 ohm low tolerance reference resistor on the PIN. This pin uses a set of commands to automatically verify the end resistance of the data output driver and the ODT through the on-chip calibration engine (ON-DIECALIBRATIONENGINE,ODCE). When this instruction is issued by the system, the resistive and ODT resistors are calibrated with the corresponding clock cycle (512 cycles after the power up and initialization, 256 cycles after exiting from the refresh operation, and 64 cycles in other cases).

5. The reference voltage is divided into two

In the DDR3 system, the reference voltage signal vref which is very important for the memory system will be divided into two signals, namely the VREFCA of the command and address signal service and the VREFDQ for the data bus, which will effectively improve the signal-to-noise level of the system data bus.

6. Point-to-Point connection (POINT-TO-POINT,P2P)

This is an important change to improve the performance of the system, but also a key difference between DDR3 and DDR2. In a DDR3 system, a memory controller deals only with a single memory channel, and the memory channel can only have one slot, so the relationship between the memory controller and the DDR3 memory module is a point-to-point (peer-to-peer) (One-physical bank module), or a point-to-point pair of dots ( point-to-two-point,p22p) Relationship (dual physical bank module), thus greatly reducing the load of address/command/control and data bus. In memory modules, similar to the DDR2 category, there are standard DIMMs (desktop pcs), So-dimm/micro-dimm (laptops), fb-dimm2 (servers), where the second generation of FB-DIMM will adopt a higher-specification AMB2 (Advanced memory buffers )。

DDR3, which targets 64-bit architectures, clearly has more advantages in frequency and speed, and, because of other features such as automatic temperature auto refresh, local refresh and so on, DDR3 is much better in terms of power dissipation, so it may be first welcomed by mobile devices, Just like the first to greet DDR2 memory is not a desktop but a server. In the fastest-growing PC desktop area of CPU FSB, DDR3 's future is bright. The new chip-Chungsee (Bearlake), which Intel is expected to launch in the second quarter of next year, will support DDR3 specifications, while AMD is also expected to support DDR2 and DDR3 two specifications on K9 platform.

The memory asynchronous working mode contains a variety of meanings, which can be called the memory asynchronous working mode when the general memory working frequency is inconsistent with the CPU's FSB. First, the earliest memory asynchronous mode of operation appears in the early motherboard chipset, allowing the memory to work in a mode that is higher than the CPU FSB 33MHz or low 33MHz (note that the simple difference is 33MHz), which can improve system memory performance or keep old memory from remaining exhausted. Second, in the normal operating mode (CPU not overclocking), many motherboard chipsets also support the memory asynchronous mode of operation, such as the INTEL910GL chipset, only support 533MHzFSB that 133MHZ CPU FSB, but can be paired with working frequency of 133MHz DDR266 , working frequency of 166MHz DDR333 and working frequency of 200MHz DDR400 normal work (note that at this time its CPU FSB 133MHz and DDR400 working frequency 200MHz has been the difference between 66MHz), but with different memory its performance is not the only. Again, in the case of CPU overclocking, in order not to allow the memory to drag the CPU overclocking ability of the hind legs, at this time can adjust the operating frequency of memory to facilitate overclocking, such as AMD's Socket939 interface Opteron144 very easy to overclocking, many products FSB can easily exceed 300MHz, And this if the memory in the operating mode of synchronization, at this time the equivalent frequency of memory will be as high as DDR600, which is obviously impossible, in order to smooth over 300MHz FSB, we can in the motherboard BIOS before overclocking the memory set to DDR333 or DDR266, after 300MHz FSB, The former is only DDR500 (some of the best memory can be achieved), and the latter is only DDR400 (completely normal standard frequency), thus, the correct set of memory asynchronous mode can help overclocking success.

The current motherboard chipset supports almost all memory asynchrony, and Intel is supported from the 810 series to the newer 875 series, while Granville provides this functionality from the 693 chipset.

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