The instruction set can be divided into complex instruction set (CISC) and thin instruction set (RISC) two parts, representing the architecture are x86 (CISC),ARM and MIPS (RISC)respectively.
arm- RISC is a chip system designed to improve processor speed, and its key technology is to complete multiple instructions in a single clock cycle. Compared with the complex instruction set CISC, the instruction set of the ARM instruction sets with RISC architecture is unified, few kinds and less addressing, simple instruction means that the corresponding hardware line can be optimized as far as possible, thus improving the execution rate. Because of the simplification of the instruction set, many tasks must be combined with simple instructions, while work for complex combinations needs to be executed by the compiler. The x86 instruction set of the CISC system because the hardware provides more instruction sets, so many of the work can be replaced by one or several instructions, the work of compiling reduced a lot.
The main features of ARM instruction set architecture are: small size, low power consumption, low cost, high performance, second, the large number of registers and most of the data operations are done in registers, instruction execution speed is faster, the routing is flexible and simple, the execution efficiency is high, and the instruction length is fixed, and the processing efficiency can be improved by multi-pipeline.
MIPS is one of the most efficient and streamlined instruction set computer architectures, and the advantages ofMIPS are five points compared with the most successful arm architectures today: one is that 64bit instruction and operation is supported by ARM, Up to now MIPS has released the P5600 series, I6400 series and M5100 series 64-bit processor architectures for high school low-end market, wherein P5600, I6400 single-core performance reached 3.5 and 3.0dmips/mhz respectively, That is, the single core can process 3.5 million and 3 million instructions per second, more than arm cortex-a53 2.3 million per second processing speed, the second is MIPS has a special divider, you can perform the division instruction; third, the MIPS kernel register is more than arm one times, Under the same performance, MIPS power consumption will be lower than arm, the same power performance is higher than arm, four MIPS instruction is slightly more than arm, perform some of the operation more flexible; The MIPS is more open to architecture licensing, allowing licensees to change designs themselves, such as more nuclear designs.
At the same time, the MIPS architecture also has some shortcomings: first, MIPS memory address start problem, which led to MIPS in memory and cache support limitations, that is, MIPS single core can not face high-capacity memory configuration, second, MIPS technology evolution Direction is the parallel thread, Similar to Intel's Hyper-threading, and arm future direction is the physical multicore, from the current development trend of core mobile devices to take advantage of physical multicore; third, although the structure of MIPS is more simple, but now is still sequential single/dual launch, ARM has evolved to disorderly sequence double/three launch, Execution instructions pipeline cycle is far less efficient than arm, four is the MIPS school development style led to its business process lags behind arm, when arm and Qualcomm, Apple, Nvidia and other chip design companies to attack the mobile terminal, MIPS also stay in HD boxes, printers and other niche market products; Five is the MIPS own system software platform is also relatively backward, application software and arm system compared to a lot less.
x86- CISC is a chip design system to facilitate programming and improve memory access efficiency, including two main features: first, the use of micro-code, instruction set can be directly in the micro-code memory, the new design of the processor, just add less transistors can execute the same instruction set, It is also possible to write new instruction set programs quickly, and the second is to have a large instruction set, x86 has a variety of instruction types including dual operation meta format, register to register, register to memory and memory to register, in order to achieve complex operation, the microprocessor provides programmers with similar registers and machine instruction functions, It also implements a very powerful function through micro-programs stored in read-only memory (ROM), which performs a series of primary instruction operations after analyzing each instruction to complete the required functions.
The dominant body of the x86 command system is now able to effectively shorten the design time of the new instructions, allowing for the upward compatibility of the CISC system machines, and the new system can use a set of instructions containing the early systems. In addition, the format of the micro-program is matched to the higher-order language, so the compiler does not have to rewrite it. Compared with the arm RISC instruction system, its disadvantage mainly includes four aspects.
First, the general register size is small, the x86 instruction set only 8 general-purpose registers, the CPU most of the time is accessing the data in the memory, affecting the execution speed of the whole system. RISC system often has a lot of universal registers, and the use of Overlapping Register window and register heap technology, so that the register resources are fully utilized.
Second, the decoder affects performance, the role of the decoder is to convert the variable length x86 instructions to a fixed length of similar to RISC-like instructions, and to the RISC kernel. Decoding is divided into hardware decoding and micro-decoding, for simple x86 instruction as long as the hardware decoding can, faster, and encountered the complex x86 instructions need to be micro-decoding, and it is divided into several simple instructions, the speed is slow and very complex.
Thirdly, the x86 instruction set has a small addressing range, which constrains the user's needs.
Four, x86 cisc single instruction length is different, the computing power is powerful, but relatively complex structure, it is difficult to integrate CISC all the hardware on a chip. The arm RISC single instruction length fixed, contains only the most frequently used instruction, the performance is general but the structure is simple, the execution efficiency is stable.
x86, ARM, and MIPS