X86 I/O port

Source: Internet
Author: User

The interaction with the peripherals is done through registers on the read-write peripherals, and the registers of the peripherals become "I/O ports", which are compiled in two ways: unified addressing and stand-alone addressing.

  Unified Addressing:

The IO registers (i.e. IO ports) in the peripheral interface are regarded as the main memory cells, each end share population with a storage unit address, a portion of main memory is used as the IO address space, for example, in PDP-11, the highest 4K main memory as the IO device register address. The port occupies the memory address space, which reduces the storage capacity.

The unified address is also known as the "IO Memory Mode", and the peripheral registers are in memory space.

  stand-alone addressing:

The IO address is separate from the storage address, and the i/0 port address does not occupy the address range of the storage space, so that there is another IO address unrelated to the storage address in the system, and the CPU must have an IO instruction (in, out, etc.) and control logic dedicated to the input/output operation. Stand-alone address, the address bus come up with a location, the device is not known to the IO port, or to the memory, so the processor through the MEMR/MEMW and Ior/iow two sets of control signals to achieve the I/O port and memory of different addressing. For example, Intel80x86 uses a separate address, CPU memory and I/O are addressed together, that is, the memory portion of the addresses and I/O addresses overlap.
Stand-alone addressing is also known as an I/O port, and the peripheral registers are located in the I/O (address) space.
For the x86 architecture, it is accessed through the In/out directive. PC architecture A total of 65,536 8bit I/O ports, composed of 64K I/O address space, numbered from 0~0XFFFF, there are 16 bits, 80x86 with a low 16-bit address line a0-a15 addressing. Two consecutive 8bit ports can be composed of a 16bit port, 4 consecutive ports composed of a 32bit. The physical address space of the I/O address space and the CPU is two different concepts, such as the I/O address space is 64K, and a 32bit CPU physical address space is 4G.

 Almost every peripheral is made from a register on a read-write device. Peripheral registers, also known as "I/O ports", typically include: control registers, status registers, and data registers , and the registers of a peripheral are usually continually addressed. There are two ways the CPU addresses the physical address of the peripheral IO port: One is I/O mapping (i/o-mapped) and the other is memory mapping (memory-mapped). Depending on the CPU architecture, whichever is used.

Some architectures such as CPUs (such as PowerPC, m68k, etc.) typically implement only one physical address space (RAM). In this case, the physical address of the peripheral I/O port is mapped to the single physical address space of the CPU and becomes part of the memory. At this point, the CPU can access the peripheral I/O port as if it were accessing a memory unit without having to set up specialized peripheral I/O instructions. This is called the "Memory Mapping Method" (memory-mapped).

Other architectures, such as X86, typically implement a separate address space for the peripheral, called the I/O address space or I/O port space. This is a different address space than the physical address space of the CPU's RAM, and the I/O ports of all the peripherals are addressed in this space. The CPU accesses the address unit (also the I/O port) in this space by setting up specialized I/O directives, such as X86 's in and out instructions. This is called the "I/O mapping Method" (i/o-mapped). The I/O address space is usually small compared to the physical address space of the RAM, such as the x86 CPU's I/O space is only 64KB (0-0XFFFF). This is a major drawback of the I/O mapping approach.

X86 I/O port

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