Intel 3D three gate Transistor design won the annual Science and Technology Innovation Award

Sina Science and technology news on the morning of October 21, the Wall Street Journal recently announced the 2011 "Science and Technology Innovation Award", Intel three gate transistor design won the Semiconductor Category Innovation Awards. The Intel three-dimensional gate transistor structure represents a fundamental shift from the D planar transistor structure.　　The key to this revolutionary outcome is the ability of Intel to put the new three-, triple-gate transistor design into mass production, usher in another new era in Moore's Law, and open the door for next-generation innovations in various types of devices. The Wall Street Journal, in its 2011 Science and Technology Innovation Awards report, evaluated the technology in this way: "Intel is the top-rated semiconductor category with three-way gate transistor designs." The Tri-grid transistor makes it possible to make smaller semiconductors, reducing energy consumption while improving performance. The chip giant in Santa Clara, Calif., is expected to launch the new technology's processor by the end of the year, putting the three-grid transistor design into mass manufacturing for the first time. The technology will be used for Intel's next-generation products Ivy Bridge, and the device using the chip is expected to go public next year. "Three-in-TRI gate transistors achieve a revolutionary breakthrough in transistors." The traditional "flat" D plane gate is replaced by a super thin, silicon-like fin that is vertically cocked from the silicon substrate. The current control is achieved by installing a gate on each side of the fin-shaped object (each with a gate on both sides and the top), rather than having a gate on the top of the D planar transistor. More control allows the transistor to pass as much current as possible (high performance) in the "Off" state, while keeping the current as close to 0 (low power) as possible in the "off" state, while also allowing for rapid switching between the two states (which is also to achieve high performance).　　Compared with the previous 32-nanometer planar transistor, the 22-nanometer three-dimensional triple gate transistor improves performance by 37% at low voltages, and the new transistor can achieve the same performance as a D planar transistor in 32 nanometers by consuming less than half of its electricity. Three-way gate transistors will be used in Intel's next generation 22 nanometer process technology. Share to: