At the 2012 International Symposium on Ultra-Violet Light (EUV), experts agreed that Moore's law, which has been acting as a semiconductor innovation engine for decades, is losing momentum due to the delay in the next generation of Ultra violet Light (EUV) micro-imaging technology.
To meet the 14nm process, the EUV system needs a 20 times times more powerful light source than today, and experts say they hope to have a 200W EUV light source by 2014, but it could take longer to reach that goal.
Over the past year, IMEC researchers in Leuven, Belgium, have made about 3,000 wafers using EUV technology through the use of lower-power light sources. However, for this millions of-dollar system, the manufacturing of commercially-produced wafers is still 15 ~30 times slower than those in the TSMC industry, such as Intel, Samsung and TSMC.
Over the past three years, researchers have increased the power of the light source by 20 times times. But in order to meet mass production requirements, they will have to make similar improvements in the next two years--a conclusion Kurt Ronse, director of IMEC's Advanced Micro-technology program, at the EUV Summit held in Brussels recently. The group also said it hoped to develop a 500~1,000w EUV light source in 2016.
"The EUV delay has hindered the semiconductor industry's advance," Ronse said. "Although they still call it 14nm, it may be more like 16 or 17nm," he says.
Miniature footsteps slowing down
In the 14nm generation, without the Euv,sram unit can not be directly miniature 50%,ronse said. This is because multiple patterns still have limitations in how much functionality they can achieve.
"If the EUV is in place, they can catch up," Ronse said. The industry has invested a lot of resources in the development of light sources, so there is bound to be a solution in the future, but it is hard to be sure whether it will happen in two years, "he said."
Both Intel and TSMC share the ASML EUV system, which amounts to $ billions of trillion.
Intel also said recently that it is expected to enter the 14nm,2015 year next year and will be expected to use existing immersion technology towards the 10nm forward. Without EUV, Intel believes it may be necessary to write up to five layers of immersion patterns on one chip, and although it will take more time and money, the company says it's still worth it.
IMEC has now used ASML Nxe 3100 EUV system to obtain more than 60% of the production time. Because of the use of the old light source, "within the first six months, we experienced a fairly long period of average time falling to the oscillation period between 50%~10%," he said.
According to the test results, IMEC has obtained the resolution of 16nm half pitch using EUV. "EUV may not be used on all layers of the wafer, but it will be used in a number of key layers and in alignment with the immersion technology," Ronse said.
Alignment is a problem. The IMEC has been able to reach the EUV and immersion layer on the wafer up to Zi Zhun degrees within 6nm. But the goal is that the Zi Zhun degree must be within 2 to 3nm, "he said.