Http://forum.eepw.com.cn/thread/119955/1
The assembly language is the read/write version of the cpu binary command. We will have a separate chapter later to describe the assembler.Statement. Readers who have never been familiar with assembly languages may be confused when reading this book.
Most MIPS assembly language
In order to compile the program on the computer composition and design-hardware/software interface, however, GCC on UbuntuX86 can only be compiled into the X86 assembly.
Sourcery codebench out a gcc toolchain for compiling to the MIPS assembler.
Our usual compilation, called Local compilation, is compiled into a compilation under the current platform. Instead, cross-compilation can be compiled into other pl
Http://blog.csdn.net/menuconfig/archive/2007/08/23/1756082.aspx
This chapter will show you how to read and write the assembly code under the MIPs system. The MIPs assembly code looks very different from the actual code because of the following reasons:
1. MIPS assembler co
Some problems encountered during the compilation of MIPS-Based C language compiler programs, mips Compiler
When I used Java to write a C-(simplified C Language) compiler, I encountered a long problem: After testing C-code input and executing parser and typechecking, A complete MIPS code is successfully compiled. However, when the
returns zero, providing a concise encoding form for the useful constant of 0. The MIPs compiler uses commands such as SLT, beq, and BNE and the 0 obtained by the register $0.To produce all the comparison conditions: equal, unequal, less than, less than or equal to, greater than, greater than or equal. You can also use the Add command to create the move pseudo command, that isMove $ T0, $ T1ActuallyAdd $ T0, $0, $ T1The predecessor of Jiao Lin mention
From: http://www.kernelchina.org /? Q = node/273
In the mips architecture, a maximum of four co-processors are supported ). Cp0 must be implemented in the architecture. It controls the CPU. MMU, exception handling, multiplication and division, and other functions depend on the cp0 of the coprocessor. It is one of the essence of MIPS and opens the door to the MIPs
Because ECOs needs MIPS-elf-GCC to compile the kernel, the GCC compiler of the latest gcc4.4.1 version is compiled today. The steps are as follows:
First, you must export the following variables before compiling:
Export target = MIPS-elf
Export prefix =/usr/local/$ Target
Export Path = $ path: $ prefix/bin
Echo $ Target
Echo $ prefix
Echo $ path
==============================
Compiling environment: fc9
Th
memory operation is restricted by the memory operation to simplify the control; while the memory operation commands of the CISC machine are many, and the operation is direct.
(3) Program: Generally, the Proteus assembly language program requires a large memory space. When special functions are implemented, the program is complex and difficult to design. However, the CISC assembly language programming is
Source code: Hello. s
# Text Segment . text . globl main main: # execution starts here La $ A0, STR # Put string address into A0 li $ v0, 4 # system call to print syscall # out a string li $ v0, 10 syscall # exit # Data Segment . data
Using JavaScript to simulate MIPS multiplication, mips Multiplication
This example describes how to simulate MIPS multiplication in JavaScript. Share it with you for your reference. The details are as follows:
I hope this article will help you design javascript programs.
used here. For the MIPs platform tool, the prefix "MIPS-Sde-elf-" is added before the name.
As: the GNU Compiler, also known as gas (GNU Compiler ER), is used to compile the Assembly source program to generate the target file.
Ld: GNU linker. The target files generated by as need to be linked by LD and relocated to generate executable files.
Objcopy: used t
number of processes is fixed, the space required for the page Directory table is fixed, and each process page Directory table is a page size; the total page table size of a process depends on the Process Code and data size.
In a typical MIPS32 system, the page size is 4 kb. in single-user mode, only bash processes exist. The page table size is about 48 KB (cat/proc/meminfo | grep PageTables ); the page Directory size can be calculated as follows:
PGD_SIZE = NR_PROCESS (exclude kernel thread) *
. LDS, and finally to the linker LD to control its behavior. LD links the address of the. text section to 0xffffffff80002000.The entry point of the kernel ELF file, that is, the address that the bootloader directly jumps to after moving the kernel, which is written by the LD into the elf header, it tries to set the entry point in sequence using the following method, and stops when the entry is successful:A. command line option-e entryB. Entry (Symbol) in the script)C. If the start symbol is defi
pseudocommands can simplify tasks, and assembler provides a richer instruction set than hardware.
$1: $ at. This register is reserved for assembly. Because the immediate numeric segment of an I-type instruction is only 16 bits, the compiler or assembler needs
Split the large constant and re-combine it into the register. For example, loading a 32-bit immediate number requires Lui (loading high immediate number) and addi
Command. Large constants suc
Reprinted from http://blog.csdn.net/gujing001/article/details/8476685
MIPS Universal Register
MIPS has 32 general-purpose registers ($0-$31), the functions of each register and the use of the assembly procedures are as follows:
The following table describes the aliases and uses of 32 universal registers
REGISTER
NAME
USAGE
$
$
-shared--enable-static
Make
Still error, prompt
Pnglibconf.c:33:19:fatal error:zlib.h:no such file or directory
Reference http://code-by.org/viewtopic.php?f=55t=169
Vim Makefile +256 instead
Default_includes =-I.-i/usr/local/mips/opencv-depend/include
Make
Make install
4, Yasm of the cross-compilation:
CC=MIPS-LINUX-GNU-GCC./configure--enable-shared--host=mi
the process of writing and debugging. And because this part of the content is very stable, once successfully run, there is little need to modify. No need to change, who will go to see it. 2 context switching is a processor-related process, the so-called context is generally referred to as the CPU registers, and each processor register is different, the switching action is not the same, this article takes MIPS as an example to explain. 3 Embedded appl
Http://blogold.chinaunix.net/u1/40363/showart_434186.htmlchapter I MIPS CPU Architecture Overview
Chen Huai Lin
1. Preface
This article introduces the MIPS architecture, focusing on its register conventions, MMU and storage management, exception and interrupt handling, and so on.
Through this article, we hope to provide a basic concept of contour for readers who are interested in
I will upload my new book, "Write My Own processor" (not yet published), today is the third article. I try four articles a week.MIPS instruction set architecture since the advent of the 80 's. has been upgrading, from the initial MIPS I to MIPS V, to support the expansion module MIPS32, MIPS64 series, and integrated code compression technology microMIPS32, microMIPS64. Each
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