Recently looking at the system clock, the Internet to find a few about the phase-locked loop data, a document, feel that they understand, share out
(i)
PLL (phase locked loop) circuit principle
In the communication machine and oth
From: http://bbs.cechina.cn/ShowTopic.aspx? Id = 2694
1
Basic components of the. PLL
Many electronic devices usually need to synchronize external input signals with internal oscillating signals, which can be achieved through the phase-locked loop.
The phase-locked
Design and Implementation of Software Phase-Locked Loop Based on fixed point DSP
[Date:]
Source: Electronic Technology Application Author: Jiang yikai Li guotong Yang genqing
[Font:Large Medium Small]
Low-track satellite communication is an important field in satellite communication applications in recent years. "Innovative No. 1" satellite
Principle and Application of Si4133 integrated with Phase-Locked Loop Chip
[Date: 2008-9-3]
Source: China Power Grid Author: Liu huaping, Guo Wei
[Font:Large Medium Small]
Introduction
Frequency synthesis technology is the main signal source of modern RF microwave systems. Currently, digital frequency synthesizer is widely used, which is ge
to the frequency that the CPU can accept. This is known as the octave. The s3c6410 can be up to 667Mhz in frequency.Phase-locked Loop circuitThe function of octave is made by a special circuit---phase-locked loop circuit. Phase-
The PLL is actually a negative feedback system that synchronizes the clock on the circuit with the phase of an external clock
The PLL phase-locked loop has three components:Phase detector PD, loop filter lf and voltage controlled oscillator VCO
Principle:
The exter
The PLL is an abbreviation for the phase-locked Loop, and the Chinese meaning is a phase-locked loop. The PLL is essentially a closed-loop feedback control system that allows the PLL ou
Pi method is a proportional integral method, and the reference http://www.elecfans.com/dianzichangshi/20120909287851.html for Pi method is introduced.Phase-Locked Loop Pi method principle reference http://wenku.baidu.com/view/86b9586fa76e58fafab003b7.htmlThe method of determining the coefficients reference http://wenku.baidu.com/view/029d23425a8102d277a22f69.htmlThis design encountered a bit of trouble, the
PLL is a feedback circuit, the full name of the PLL is phase-locked Loop, referred to as the PLL. The function is to synchronize the clock on the circuit with the phase of an external clock. Because the PLL can realize the output signal frequency to the input signal frequency automatic tracking, so the
With s3c2440 clock power Management As an example, 24,401 can be configured using an external crystal or an external clock as the clock source via Om[3:2]. External Crystal general selection of 12MHZ, and 2440 if the work in this frequency is obviously overqualified, 2440 normal operating frequency up to 400MHZ, obviously from 12MHZ to 400MHZ need octave, 2440 through the phase-locked
The content source of this page is from Internet, which doesn't represent Alibaba Cloud's opinion;
products and services mentioned on that page don't have any relationship with Alibaba Cloud. If the
content of the page makes you feel confusing, please write us an email, we will handle the problem
within 5 days after receiving your email.
If you find any instances of plagiarism from the community, please send an email to:
info-contact@alibabacloud.com
and provide relevant evidence. A staff member will contact you within 5 working days.