AM/DM37xx MPU GPIO_120 ~ GPIO_129 extended-drain GPIOs cannot be used as standard GPIO. Why ?, Dm37xxgpio

AM/DM37xx MPU GPIO_120 ~ GPIO_129 extended-drain GPIOs cannot be used as standard GPIO. Why ?, Dm37xxgpio

See https://e2e.ti.com/support/dsp/davinci_digital_media_processors/f/537/p/103699/1482774#1482774
The Omap series processor and standard GPIO are all 1.8V voltages. Because the SD/TF card has very special voltages, there are 1.8 V and 3.0 V, therefore, TI has made a compatible design, GPIO120 ~ The GPIO129 pins can work in the 1.8V or 3.0V mode. How does TI implement this? That is, PBIAS technology. Most OEMs encounter issues that cannot be used as standard GPIO when using these pins. These pins are always in a low-level State regardless of configuration.

The registers controlled by the PBIAS0 and PBIAS1 modules are configured in the following sequence. From top to bottom, there is no error. It is performed during the initialization of the TF Driver (working at the 3.0V voltage ):
CONTROL_WKUP_CTRL: GPIO_IO_PWRDNZ = 0
CONTROL_PBIAS_LITE: PBIASLITEPWRDNZ0 = 0, PBIASLITEPWRDNZ1 = 0
Sleep (100)
CONTROL_PBIAS_LITE: PBIASLITEVMODE0 = 1, PBIASLITEPWRDNZ0 = 1, PBIASLITEVMODE1 = 1, PBIASLITEPWRDNZ1 = 1
CONTROL_WKUP_CTRL: GPIO_IO_PWRDNZ = 1
CONTROL_DEVCONF1: 1 <24 // why?
Note:
Do not configure PBIAS to work at 1.8 V, while the external voltage provided to the vdds_x and vdds_mmc1 pins is 3.0 V, which will damage the device, for more information, see AM/DM37x TRM Version R P.2538.
2. Why should vdds_x and vdds_mmc1 be connected to a power supply pin of the ldos at the same time?
The following section describes how to connect the MMC interface:
Http://processors.wiki.ti.com/index.php/AM37x/DM37x_Schematic_Checklist? KeyMatch = vdds_x & tisearch = Search-EN-Everything