ar# 30522:logicore rapidio-how do system_reset and link_reset work?

Description

How does System_reset and link_rest work?

Solution

Lnk_linkreset_n (Input):

In Xilinx SRIO example design, RIO_RESET.V are provided to handle link reset. It issues a lnk_linkreset_n when a system reset occurs. This causes the SRIO PHY to send four link reset control symbols to the connected device forcing it to reset. Once This link goes down, a system reset was then issued to the SRIO PHY. This reset sequence are necessary to prevent ackids from getting out of sync.

Lnk_reset_n (Output):

Indicates that the core have received four reset device control symbols from the linked device and PHY is going through the Reset. This output should is used to reset the Phys side of the buffer to avoid misalignment of ackid.

Sys_reset_n (Input):

Asserting sys_reset_n causes a hard reset of the entire core. The initial hard reset should is generated by the user as part of the startup sequence and subsequently as needed by the L Nk_reset_n. Special care must is used when resetting the RapidIO device. Both Link Partners (Devices) should is reset to guarantee ackid alignment.