Arm Assembly-addressing

ARM7TDMI (-S) has a 32-bit arm instruction set and a 16-bit thumb instruction set.

 High arm Instruction Set efficiency, but high code Density

 The thumb Instruction Set has a high code density, but it still maintains the most performance advantages of arm, which is a subset of arm.

 All arm sets Zero can be executed with conditions, while thumb sets zero and only one command can be executed with conditions.

 Arm and thumb programs can call each other, and the overhead of status switching between them is almost zero.

 

First, let's look at the classification:

I. Addressing of Data Processing Instruction operands

              1. Immediate data addressing

              2. Register addressing

              3. Register shift addressing

Ii. Addressing of Memory Access Instruction operands

              1. Register indirect addressing

              2. base address addressing

              3. Relative addressing

              4. Multi-register addressing (Block copy addressing)

              5. Stack addressing

Here we will introduce them one by one:

Arm has nine addressing methods

Addressing Mode:

1. Addressing now:

         The part after the operation code field in the immediate addressing instruction is the operand province. That is to say, the data contains

     In this case, the operations that can be used immediately are obtained from the command. Example:

        Subs  R0, R0, #1            ; R0 minus 1, the result is placed in r0, and the flag is affected

       MoV  R0, #0xff000        ; Load the number 0xff000 to the R0 register

    Arm rules: the immediate number must conform to the 8-Bit Bitmap format, and the "text pool" method must be used to load the data through memory access commands. The so-called 8-Bit Bitmap Format refers, this data can be obtained through an 8-bit number loop with an even number shifted to the right.

2. Register addressing:        

The value of the operand is in the register. The address field in the instruction specifies the Register number.

     The output register value. Example:

        MoV R1, R2              ; Store the R2 value to r1

        MoV R0, R1, R2            ; The R1 value minus the R2 value, and the structure is saved to R0

3. Register shift addressing

           Register shift addressing is a unique addressing method for ARM processors. When the second operand is the register shift mode,

     The second operand selects the shift operation before it is combined with the first operand. Example:

       MoV  R0, R2, LSL #3     ; R2 value shifts three places to the left, and the result is put into r0, that is, R0 = R2 * 8

       ANDSR1, R1, R2, LSL r3   The value of R2 shifts the R3 bit to the left, and then performs operations with the R1 phase. The structure is placed in R1.

   The commands that can use the shift operation are as follows:

     LSL left shift, LSR right shift, ASR arithmetic right shift, Ror loop right shift, rrx with extended loop right shift

4. Register indirect addressing:

          The address code in the indirect addressing instruction in the register is a general register number, and the required operands are saved.

     In the storage unit of the address specified by the register, that is, the Register is the address pointer of the operand. For example:

        LDR R1, [R2]        Save the data in the unit to which R2.

        SWP R1, R1, [R2]     Exchange the value of register R1 with the Unit pointed to by R2.

5. base address addressing:

        Base Address addressing is to add the content of the base address register to the offset given in the instruction to form an effective operand.

     Address.

        Base Address addressing is used to access storage units near the base address. It is often used for table queries, Array Operations, and access to non-register functions.

     Q & Example:

       LDR R2, [R3, # 0x0c]   ; Read the content of the storage unit pointed to by the R3 0x0c address, and put it in R2

       Str R1, [r0, #-4]!     First R0 = R0-4, and then store the value of R1 to the Unit pointed to by R0

       LDR R1, [r0, R3, LSL #1]Read the content of the Unit on R0 R3 * 2 and store it in R1.

6. Relative addressing:

   Relative addressing is an alternative to base addressing. The base address is provided by the program counter PC, and the address code field in the instruction is offset. The obtained addresses are the valid addresses of the operands.

7. Multi-register addressing:

       Multi-register addressing refers to the ability to transmit the values of several registers at a time, allowing an instruction to transmit any subset of 16 registers or

     All memory, for example:

 Ldmia R1 !, {R2-R7, R12}; read data from the unit to which R1 points to the R2---R7, R12 (R1 auto)

 Stmia R0 !, {R2-R7, R12}; read data from R2---R7, R12 once into the unit to which R0 points (R0 automatic)

8. Stack addressing (Block copy addressing ):

       A stack is a storage area for access in a specific order. The operation sequence is divided into "first-in-first-out" and "last-in-first-out". Stack addressing is implicit, it uses a special register (Stack pointer) to point to the storage area (stack), the pointer to the storage unit is the top of the stack.

       Memory stacks can be divided into two types:

         Upward growth: increasing the stack

         Downward growth: decreasing the stack

    Whether the content pointed to by the current stack pointer is valid can be divided into: full increase, empty increase, full decrease, empty decrease

    Example:

       Stmfd  SP !, {R1-R7, LR}  ; R1---R7, LR into the stack. Full decline Stack

        Ldmfd  SP !, {R1-R7, LR}  Data Out stack, into the R1---R7, LR register, full decline Stack

          Problem: the stack is advanced and later Put R1 --- R7 into the stack first, and then output the stack in the above form. Can the data be restored? Did you flip the restored data?