Arm Bare-Metal Programming series----Nandflash

NAND flash controllers for NAND flashs5pv210 have the following features:

• Page sizes that support 512byte,2k,4k,8k
• Write and erase NAND flash through various software modes
• 8bit of Bus
• NAND Flash support for SLC and MCL
• ECC Support for 1/4/8/12/16bit
• Supports access to data/ECC registers in bytes/half words/words, and accesses other registers in words.

Note: The GEC210 NAND flash type for this use is SLC, size 512MB, model k9k8g08u0a. Therefore, the content of this chapter is for the SLC type of NAND flash (including 256M/512M/1GB, etc.) and does not apply to MLC type NAND flash.


Examples of programs:

/*nand.c*///NAND Flash initialization function nand_init (), code as follows void Nand_init (void) {   ///1. Configuring NAND flash   nfconf = (tacls<<12 )| (twrph0<<8) | (T    WRPH1<<4) | (0<<3) | (0<<2) | (1<<1) | (0<<0);   Nfcont = (0<<18) | (0<<17) | (0<<16) | (0<<10) | (0<<9) | (0<<8) | (0<<7) | (0<<6) | (0x3<<1) | (1<<0);   2. Configuration pin   Mp0_1con = 0x22333322;   Mp0_2con = 0x00002222;   Mp0_3con = 0x22222222;   3. Reset   

The first step in configuring NAND Flash is to set the nfconf and Nfcont two register steps:

nfconf Register

addrcycle = 1,when Page size is 2K or 4 K, 1 = 5 The address cycle,gec210 NAND Flash page sizes are 2k, all 5 addresses are cycles;
PageSize = 0,when Mlcflash is 0, the value of PageSize is as follows:0 = 2048 bytes/page,mini210s uses SLC NAND Flash and each page size is 2k;
Mlcflash = 0, where SLC NAND Flash is used;
Twrph1/twrph0/tacls is about the access timing settings, to be set against the NAND Flash chip manual, which is no longer explained in detail, take Twrph1=1,twrph0=4,tacls=1 respectively;
Ecctype0/msglength, our bare-metal code is not used to ECC, all without setting these two flags.

、

MODE = 1 To enable NAND flash controller;
Reg_nce0 = 1, the elimination of chip selection, the need to operate NAND flash when the chip selection;
Reg_nce1 = 1, the elimination of chip selection, the need to operate NAND flash when the chip selection;
Initmecc/initsecc/secclock/mecclock, our bare-metal code does not involve ECC, these 4 flags can be arbitrarily set;
Rnb_transmode = 0,detect Rising Edge,rnb is a state probe pin for NAND flash, we use the rising edge to trigger;
Enbrnbint = 0, prohibit RnB interrupt;
Enbillegalaccint = 0, disable illegal access interrupt;
Enbmlcdecint/enbmlcencint for MCL-related, without setting;
Lock = 0, we do not use soft lock, so soft lock is forbidden;
Locktight = 0, we do not use the lock-tight, all prohibit lock-tight;
MLCECCDIRECTION,MLC related, can not be set

The second step is to configure the pins for NAND flash related functions;
The third step resets the reset function nand_reset the relevant code as follows:

static void Nand_reset (void) {     nand_select_chip ();    Nand_send_cmd (nand_cmd_res);     Nand_wait_idle ();     

NAND Flash Reset Operation a total of 4 steps: 1) to send the film, the essence is Nfcont &= ~ (1<<1), Nfcont Bit[1] write 0;
2) Send command reset command nand_cmd_res (0xff), essentially nfcmmd = CMD; write command to NFCMMD register; complete NAND flash command information see:

3) Wait for NAND Flash to be ready; Nfstat & (Busy<<4))), read Nfstat bit[4] Check if NAND flash is ready;
4) Cancellation of the film selection, the Essence is Nfcont |= (1<<1); To Nfcont's bit[1] write 1;


<2> NAND Flash Read ID function nand_read_id (), the code is as follows

void nand_read_id (void) {   nand_id_info nand_id;   1. Hair-selected   nand_select_chip ();   2. Read ID   nand_send_cmd (nand_cmd_read_id);   NAND_SEND_ADDR (0x00);   Nand_wait_idle ();   nand_id. IDm = Nand_read ();   nand_id. IDd = Nand_read ();  nand_id. id3rd = Nand_read ();   nand_id. id4th = Nand_read ();   nand_id. id5th = Nand_read ();   printf ("Nandflash:makercode =%x,devicec Ode =%x\r\n", nand_id. idm,nand_id. IDD);   Nand_deselect_chip (); }

NAND Flash Read ID operation

According to, NAND Flash read ID operation a total of 4 steps:
The first step to send the film selection;
The second step is to read the ID command nand_cmd_read_id (0x90);
The third step sends the address 0x00; Call function nand_send_addr ();
The fourth step waits for NAND Flash to be ready;
Fifth step read ID; call the Nand_read () function, essentially read the Nfdata register;

/*NAND_SEND_ADDR () */{   //column address, that is, the address in the page   col = addr% Nand_page_size;   Line address, or page address,   row = addr/nand_page_size;   Column Address a0~a7   nfaddr = col & 0xff;   for (i=0; i<10; i++);  Column Address a8~a11   nfaddr = (col >> 8) & 0x0f;   for (i=0; i<10; i++);   Row Address a12~a19   nfaddr = row & 0xFF;  for (i=0; i<10; i++);   Row Address a20~a27   nfaddr = (row >> 8) & 0xFF;   for (i=0; i<10; i++);   Row Address a28~a30   nfaddr = (row >> +) & 0xFF;   

First, according to the page size to get the page address and the offset address in the page, and then send the address through 5 cycles, essentially write nfaddr register, how to send each cycle, consult the NAND flash chip manual, see:

After sending the address, you can read 5 consecutive IDs, the first of which is Makder code, and the second is device code.

NAND Flash erase operation NAND Flash erase function nand_erase (), the core code is as follows:

Nand_erase () {   //Gets the row address, which is the page address   unsigned long row = Block_num * nand_block_size;   1. Emitting a chip selection signal   nand_select_chip ();   2. Erase: The first cycle sends the command 0x60, the second cycle sends the block address, the third cycle sends the command 0XD0 Nand_send_c    MD (nand_cmd_block_erase_1st);  for (i=0; i<10; i++);   Row Address a12~a19   nfaddr = row & 0xFF;   for (i=0; i<10; i++);   Row Address a20~a27   nfaddr = (row >> 8) & 0xFF;   for (i=0; i<10; i++);   Row Address a28~a30   nfaddr = (row >> +) & 0xFF;   Nfstat = (Nfstat) | (1<<4);   Nand_send_cmd (nand_cmd_block_erase_2st);   for (i=0; i<10; i++);   3. Wait ready   nand_wait_idle ();   4. Read state   unsigned char status = Read_nand_status ();}

According to the NAND Flash erase operation is a total of 6 steps:
The first step to send the film selection;
Second Step Erase command 1 nand_cmd_block_erase_1 (0x60);
The third step sends the page address, just sends the page address;
Fourth Step Erase command 2 nand_cmd_block_erase_2st (0xD0);
The fifth step waits for NAND flash to be ready;
Sixth step read status to determine if the erase was successful. If the erase fails, then the print is bad block and then cancel the chip selection, or directly cancel the chip selection. The read state invokes the function Read_nand_status (), the essence of which is nand_send_cmd (nand_cmd_read_status); ch = nand_read (); First read status command nand_cmd_read_ Status, and then read the state value again.

NAND Flash read Operation <4> NAND flash read function Copy_nand_to_sdram (), read data from NAND flash to DRAM, the core code is as follows:

Copy_nand_to_sdram () {   //1. Send the chip selection signal nand_select_chip ();  2. From the NAND read data to SDRAM, the first cycle of the command 0x00, the second cycle of the address nand_addr, the third cycle of the command 0x30, can read a page (2k) of the data while  (length)  {     Nand_send_cmd (nand_cmd_read_1st);     NAND_SEND_ADDR (NAND_ADDR);     Nfstat = (Nfstat) | (1<<4);     Nand_send_cmd (nand_cmd_read_2st);     Nand_wait_idle ();     Column address, which is the in-page address     unsigned long col = nand_addr% Nand_page_size;     i = col;     Read a page of data, each copy of 1byte, a total of 2048 (2k), until the length of the data copy completed for     (; i<nand_page_size && length!=0; i++,length--)     {       *sdram_addr = Nand_read ();       sdram_addr++; nand_addr++;     }   }   3. Read state   unsigned char status = Read_nand_status ();}

NAND Flash Read operation

According to, NAND Flash read operation a total of 7 steps:
The first step to send the film selection;
Second Step Read command 1 nand_cmd_read_1st (0x00);
The third step sends the address, call function Nand_send_cmd (), send 5 address period;
Fourth Step Read Command 2 nand_cmd_read_2st (0xD0);
The fifth step waits for NAND flash to be ready;
The sixth step reads from the offset address in the page, and ends at the end of the page, reading 1byte at a time;
Seventh step reading status, determine whether read success.

NAND Flash write operation NAND Flash write function Copy_sdram_to_nand (), write data from DRAM to NAND flash, the core code is as follows:

Copy_sdram_to_nand () {   //1. Send the chip selection signal   nand_select_chip ();   2. From SDRAM reading data to NAND, the first cycle sends the command 0x80, the second cycle sends the address NAND_ADDR, the third cycle writes a page (2k) of data, the fourth cycle is 0x10 while   (length)   {     Nand_send_cmd (nand_cmd_write_page_1st);     NAND_SEND_ADDR (NAND_ADDR);     Column address, which is the in-page address     unsigned long col = nand_addr% Nand_page_size;     i = col;     Write a page of data, each copy 1byte, a total of 2048 (2k), until the length of the data copy completed for     (; i<nand_page_size && length!=0; i++,length--)     {       nand_write (*sdram_addr);       sdram_addr++;       nand_addr++;     }     Nfstat = (Nfstat) | (1<<4);     Nand_send_cmd (nand_cmd_write_page_2st);     Nand_wait_idle ();   }    3. Read state   unsigned char status = Read_nand_status ();}

According to, NAND Flash writes a total of 7 steps:
The first step to send the film selection;
The second step is to write the command 1 nand_cmd_write_page_1st (0x80);
The third step sends address address, call function Nand_send_cmd (), send 5 address period;
Fourth Step Read Command 2 nand_cmd_write_page_2st (0x10);
The fifth step waits for NAND flash to be ready;
The sixth step starts from the offset address in the page, reads the end of the page, and writes 1byte at a time;
Seventh step reading status, determine whether read success.


2. Main.c
In Main.c, you first call Nand_init () to initialize NAND flash and then print a menu that provides 4 options for testing NAND flash:
Read ID function (nand_read_id ());
Erase function (Nand_erase ());
Read function (Copy_nand_to_sdram ());
Write function (Copy_sdram_to_nand ());

Full code Address: Https://github.com/zhouhui321/gec210-nos/tree/master/nand

Arm Bare-Metal Programming series----Nandflash