CPU design-Simple CPU composition

Logically, everyone knows that a computer is composed of an operator, a controller, a memory, an input device, and an output device. This is only an extremely general understanding of the non-professional. For those who want to design the CPU, this superficial understanding is obviously too big. Even the simplest computer CPU structure, is far from the concept of "the CPU and the controller collectively referred to as CPUs", and should actually be understood as: The computer's CPU is composed of control units, computing units and storage units. What are control units, operating units, and storage units? In Figure 3-1 we roughly give a simple CPU structure in three colors, which are control units, units of operation and storage units, respectively, from left to right.

The control unit has the instruction register IR, as well as controls the logic control and so on. The operating unit has an operator Alu and its front-end registers A, B, and various arithmetic control logic. The storage unit contains more devices, program memory Irom with program counter PC, data memory DRAM and address register mar, and accumulator da and output register out etc. They represent only a very simple CPU structure. This kind of structure will connect the equipment through the public line, common use of the line in China is generally called the bus. There are often multiple wires in a common line where multiple devices are connected, and sometimes people also call a line that is composed of multiple conductors. This designation of a multi-strand line as a bus is a habit that is actually very easy to distinguish.

The structure of the various devices connected with the bus is called the bus structure. Bus structure is a basic structure of computer design, which is the standard of computer structure design for a long time. The bus structure data transmission mode is broadcast type. The device connected on the bus cannot have 2 or more 2 devices to transport data to the bus, which can cause data confusion. In turn, a device sends data to the bus, and all other devices connected to the bus can be received at the same time.

In Figure 3-1, this simple computer CPU uses a read-only memory Irom to place the program, and the instruction address is indicated by the Register PC. Since the PC is specifically directed to the address of the instruction, it is customary to call the program counter. Memory dram, which can be read and written, is specifically placed on the data and is therefore called a data memory. The memory cell address of the DRAM is indicated by the Register Mar, and the Mar is called the address register. The Independent register DA is used to temporarily store data, especially the intermediate operation results of some instruction execution, which is commonly referred to as accumulators. The register out is used to hold the output data, known as the output register. Alu is an operator, Alu generally can perform arithmetic operations and logic operations, such as a variety of operations, A, B is its front-end register, to maintain the data involved in the operation. When the ALU is in operation, the data that participates in the operation must be stable, so there is a front-end register to ensure the stability of the data.

Logically, Irom, DRAM is the memory of this computer, and they and the temporary storage data of Mar, DA, out and the PC and other registers constitute the computer's storage unit. The storage unit is the place where the program and data are stored, and the data stored for a long time is kept in the memory, and the temporary saved data is usually placed in the register. The data in the register is read and written fast, while the data in the memory is read and written, which is relatively slower.

The ALU is responsible for data calculation. The various operations of the equipment are not the same, so the inside of the ALU is also very complex. For example, there are arithmetic plus subtraction arithmetic, multiplication arithmetic, logic arithmetic, floating-point arithmetic and other operating equipment.

The main control unit is the controller, the most important of which is the control matrix, clock oscillator and metronome, etc., instruction register is it for the instruction analysis, save the instructions of the temporary device. When people do not carry out design research, they put the instruction register in the controller instead of mentioning it separately. The previous design rarely considered the change of program transfer, so the accumulator, program counter and other storage devices on the control unit side, and they collectively referred to as the controller. This book classifies them on one side of the storage unit, taking into account the rapid transfer of the program. This kind of division seems simple, but it leads to the revolutionary change of the computer program running transformation. This is the way I came up with the "deadlock" that my research program had done more than 10 years ago. This division leads to the problem of the dynamic change of multiprocessor CPUs. In the past, many computer designs used one of the front-end registers A and B as accumulators, which made it easy to use the results of the preceding instruction. But the things in the world tend to have a disadvantage, this design is not easy to transfer the program to the other processor execution, the multi-processor in the same machine parallel program execution mode, or the accumulator independent will be better. In this regard, we will describe it in the section on dynamic computers.

adding accumulators and program counters to a storage unit allows you to change the program's instructions between the controller and the operator without leaving data, which we call inter-directive processor-independent. The processor of the CPU is the general name of the control unit and the arithmetic unit, also called the instruction execution unit or the processor, with the PU (performance unit) to remember. The removal of PU in the CPU, the remaining part is the storage unit, we use MU (Memory unit) to remember. In this way, the CPU of the computer is composed of PU+MU.

Common bus bus is made up of multiple conductors, and the number of conductors is generally not less than the number of digits of the operator or register. Now the popular design, will be the number of bus wires and operators consistent, when the actual use of less than so many wires, let part of the wire temporarily idle.

CPU design-Simple CPU composition