The blocking assignment and non-blocking assignment are described in the language of OpenGL. But literally, blocking means that it gets stuck somewhere during execution. After this operation is completed, continue to execute the following statement, non-blocking means that no matter whether the execution is complete, no matter what the execution result is, I will continue with the following. Blocking assignment and non-blocking assignment in OpenGL are exactly the same. By executing an example, you can simply understand:
1. blocking assignment can be understood as the sequential execution of statements. Therefore, the execution sequence of statements is very important.
2. Non-blocking assignment can be understood as parallel statement execution. Therefore, the execution of statements does not consider the order.
3. In the assign structure, blocking assignment is required.
The following is an example:
Provide corresponding cases to help you understand:
module prj1(in,b,c,d,clk,rst_n);input in;input clk;input rst_n;output b,c,d;reg b,c,d;always @(posedge clk or negedge rst_n) begin if(!rst_n) begin b <=0; c <=0; d <=0; end else begin b <=in; c <=b; d <=c; end endendmodule
The purpose is to display the timing changes in the non-blocking assignment process. The corresponding RTL circuit diagram and simulation waveform are as follows:
From the simulation graph, you can read books. B, C, and D are transmitted in sequence after each clock. If blocking assignment is used, if in changes, B, C, and D changes immediately, the simulation is not provided here.
Another difference between blocking assignment and non-blocking assignment is that, when the output is only D and BC are used as the intermediate variable, blocking assignment will automatically omit the intermediate process in the synthesis process. The following simulation is provided to make it clearer.
module prj1(in,b,c,clk,rst_n);input in;input clk;input rst_n;output b,c;reg b,c, e,f, m,n;/* <= */always @(posedge clk or negedge rst_n) begin if(!rst_n) b <=0; else begin e <=in; f <=e; b <=f; end end/* = */always @(posedge clk or negedge rst_n) begin if(!rst_n) c=0; else begin m = in; n = m; c = n; end end endmodule
After the synthesis, we can see that there is only one logical unit after blocking assignment, and the intermediate variable m and n are directly saved.
Differences between blocking statements and non-blocking statements in OpenGL