Discussion on the problem of Makefile

Discover a pattern that is normally performed in the previous level Makefile: make -C xxx CFLAGS="$(CFLAGS)" , then the settings in the Xxx/makefile CFLAGS will not take effect.

Do an experiment.

To create a directory like this:

Content of Makefile:

Cflags=-i. /xxxall: @echo---top:cflags=$ (CFLAGS)---make-c sub cflags= "$ (CFLAGS)"

Content of Sub/makefile:

Cflags+=-l/usr/includeall: @echo---sub:cflags=$ (CFLAGS)---

We sub/makefile in the middle of the show CFLAGS .-L/usr/include
By understanding, the output of the sub/makefile should be: -I../xxx -L/usr/include , and the content of the implementation output is-I../xxx

Prove that the sub/makefile is CFLAGS+=-L/usr/include not effective at all.

Circumvention methods

What should we do then? Tried, and changed the Makefile to this:

Cflags=-i. /xxxexport cflagsall: @echo---top:cflags=$ (CFLAGS)---make-c Sub

You can use the Export keyword to pass the CFLAGS variable down.

Questions

Even if it is evaded, but what is the fundamental problem of this phenomenon? How to solve?

Discussion on the problem of Makefile