Drive: I²c Drive

1. IIC Agreement:

<<um_s3c2440a_rev10.pdf>> p481 Figure 20-3. Iic-bus Interface Data Format
<<AT24C08_DataSheet.pdf>> Figure 1-12 Bus Timing and Device operations

roles in the IIC bus:
Host (Master): The device that initiates the sending, generates a clock signal, and terminates the transmission
Slave (Slave): Device addressed by the host

the principle of i²c is:
In the scl=1 (High level), SDA must not be fooled!!! Otherwise, SDA jump "penalty" is "start signal S", SDA on the jump "penalty" is "stop signal p".
At scl=0 (Low level), SDA casually fooled!!! (Don't overdo it to the SCL high jump)
A bus has only one host, and the others are slave machines.

An example of an IIC interaction:
Write AT24C08:
Start signal + addr + data[n] + stop signal
{
1. Master sends start signal: [SCL high +SDA falling edge]

2.1. Master sends Addr:7-bit device address + r/w; Immediately after the end of the level to pull high, waiting for the slave ack;
[SDA prepares data at SCL low, sends data on SCL rising edge] * 8 times
The MSB---First sends the highest bit data SDA.
2.2. Slave receives master's start signal and starts monitoring master's data. When you receive addr and find that addr is your own time, pull down SDA immediately to indicate that the transmission is valid (this is called ACK).

3.1 The host receives an ACK and then sends the data, here is the write 1 bytes, and send addr in the same way to send 8 bit in a row.
Similarly, immediately after the end of the level to pull high, waiting for the slave ack;
3.2 Slave received 8 bits of data completed, immediately pull down SDA to indicate the transmission is valid (ACK).

4. Master receives an ACK and immediately sends a stop signal to close the communication.

Description
The IIC protocol allows multiple bytes to be transmitted in a single connection, the maximum number of bytes allowed to see the device (AT24C08 allows 8 bytes of continuous transmission), but must be in 8bit, the receiver will give an ACK to continue the subsequent transmission.
It is clear that start and stop are initiated by master.

}

An example of an IIC interaction:
Read AT24C08:
Start signal + addr + data1 + start signal + addr + data2[n] + stop signal
{
You're right, there are two start, one stop at a time.
Two times the addr address is the same slave, the difference is that their 8bit, the first time is w (because to write the address), the second is R (read data)
DATA1 specifies which address in the AT24C08 the data is stored in.
Data2[] is the data to write.
}

2. IIC Drive
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Drive: I²c Drive