Everything about stm32

Cortex-M3 is a 32-Bit Core, in the traditional single chip microcomputer field, there are some different from general 32-bit CPU application requirements. Tan Jun, for example, in the field of industrial control, users require faster interrupt speed, Cortex-M3 uses the tail-chaining interrupt technology, completely based on hardware for interrupt processing, A maximum of 12 clock cycles can be reduced, and 70% interruptions can be reduced in actual applications.

The Cortex-M3 processor uses a ARMv7-M architecture. It includes all 16-bit thumb instruction sets and basic 32-bit thumb-2 instruction set architecture, where the Cortex-M3 processor cannot execute the arm instruction set.

The Cortex-M3 uses the tail-chaining interrupt technology, which is completely hardware-based interrupt processing, which can reduce the number of 12 clock cycles at most and reduce the number of interruptions by 70% in practical applications.

Thumb-2 has made a lot of improvements in the thumb instruction set architecture (ISA). Compared with thumb, thumb has a higher code density and provides a higher performance of 16/32-bit commands.

The Cortex-M3 processor supports two working modes: thread mode and processing mode. The processor enters the "thread mode" When resetting, and this mode is also used when an exception is returned. The privileged and user (non-privileged) mode code can run in the "thread mode.

In exception mode, the processor enters "processing mode". In processing mode, all codes are accessed with special privileges.

 

Everything about stm32