FPGA-based DW8051 transplantation (III.)

Summarize the questions:

1) http://www.cnblogs.com/sepeng/p/4137405.html FPGA-based DW8051 transplant (a) inside with Modelsim Observation waveform Discovery program into the Idata interval initialization cycle to jump out, Did not enter the user program this piece.

2) http://www.cnblogs.com/sepeng/p/4141072.html FPGA-based DW8051 Transplant (ii) the Idata interval initialization is removed, the program enters the user program but found in the execution of the delayms function, The loop executes and jumps into the for loop at the last jump back to main function main.

This one, I'm going to get rid of the for loop and check the execution.

1#include <reg51.h>2 #defineUchar unsigned char3 #defineUINT unsigned int4 5Sbit LED = p0^0 ; 6 7 voidDelayms (UINTx)8 {9     //Uchar i;Ten      while(x--); One     //{ A         //For (i=0;i<2;i++); -          -     //} the } -  - voidMain () - { +LED =1 ;  -     while(1)  +     { A       atDelayms (5); -led=~LED; -     } -}

This time the execution is based on the debug inside the KEILC, the execution address sequence should be

1 b 1C 1D-1E 1F 20 (header File execution complete)

--(Enter the main function).---------and----0A 0B ( starts to jump to the sub function )

10 ..... (Loop here five times)

--(last)--11-->12----------and 1A (child functions completed)

--(Back to main function) 0C 0D--0E 0F------------------

--........ Cycle
　　

In Modelsim, you see a command execution error, where the red font above executes an error, and the wrong way is to read one more data at a time.

Normal: 0A 0B ( start to sub-function to jump) actual: 0A 0B 0C

Normal: () actual:

　　　　　　　　Normal:--> ( jump back function loop) actual: 1 a

One common feature of these three places is the need to jump.

　　

　　

　　

In this case, the third evasion (the first avoidance of memory initialization loop, the second evasion for) modify the C program as follows, avoid the jump behavior of the sub-function

1#include <reg51.h>2 3Sbit LED = p1^0 ; 4 5 6 voidMain ()7 {8LED =1 ; 9 Ten     while(1)  Oneled=~LED; A  -}

But this main function must have a loop in main, so loop is still unavoidable, the final address jumps to

06 07 08 (Initialization run completed).

(Enter main function) 0A--0B 0C--0D 0E (main function finished running)

(loop) 0B 0C--0D 0E (Loop)

Seen from the Modelsim, the case of this nuclear operation is

0D 0 E is executed at 0D 0E 0F at the first moment of each jump. is to execute a more statement, the statement address 0F

Let's look at the SFR I've cared about for a long time.

Front 01 81 00 I am really drunk, 81 but p0^1 Ah, can not explain, the latter 90 is in line with expectations, the problem comes again, this data_out how not obedient?

Crazy, nuclear.

FPGA-based DW8051 transplantation (III.)