Improvements to easyarm2200 hardware design ZZ

Source: Internet
Author: User

Sender: gdtyy (gdtyy), email area: embedded
Question: How to Improve easyarm2200 Hardware Design
Mailing station: shuimu community (Mon Jun 25 23:42:42 2007), within the station

Several improvements to easyarm2200 Hardware Design

I recently used easyarm2200 to learn about arm development and found some problems and many improvements to this board. Hope
These suggestions can help you turn the Development Board into a product.

====
* Hole *
====
Four installation holes of easyarm2200 are incorrect. The correct method is to evenly distribute eight round/horseshoe welded discs.
Metallic small hole, non-metallic middle hole (not immersed in copper ). This is because the installation hole is connected to the shell through a screw, and the shell is a simulated place.
In analog and digital locations, single point/multi point (high frequency) grounding is required. If the mealing center hole is large
, Equivalent to a large area of ground, leading to the connection of the simulated ground and the large area of the digital ground, which cannot suppress mutual interference.
Easyarm2200 board mounting hole center metal makes 8 small holes into a decoration.
It is not appropriate for the C26, c27, and c28 capacitors to share one pass hole. at most two devices share one pass hole.
, Beyond this limit, the capacitor will be ineffective.

============
* Network electrical port *
============
An error occurred while handling the 10 m network electrical port. Because the cat5e twisted pair wires on site may be more than 100 meters long, which is a very large interference source,
The RJ45 interface should be stretched out as much as possible to reduce the length of the twisted pair into the board and block the interference. In addition
Split the interface and digital place on the copper skin of the corresponding primary and secondary layers, and then split the two types
Local single point connection. Without separation, it is equivalent to connecting a simulated ground to a digital ground with a large area, which violates the single point grounding principle.
.

====
* Lamp *
====
The indicator light should be clear, non-glare, and the same brightness. I found all the indicators are clear,
LED1-LED8 is eye-catching, lossy user vision health, and power-on indicators, Nic indicators, LED1-LED8 brightness is not
. In addition, the LED1-LED8 throttling resistance is best to use the table group (province ).

======
* Power supply *
======
The power supply part on the board is not separated from the digital part, but is placed in a large area under the power supply, which is not conducive
The noise is reduced, but the noise is transmitted through copper. In either case, the analog ground must be connected to the digital ground.
It is certainly wrong to connect products or do not distinguish between analog numbers. Public noise cannot be ignored.
I do not agree that 7805 of the heat sink is lying on the copper of the Board, because the heat is eventually dispersed to the board, and
7805 is near the ldos, with overheating protection function, is sensitive to heat, so it is best to put 7805 carrying a heat sink vertical in the air duct
In this way, the heat is more easily dispersed out of the Board.
7805 high-speed USB function blocks on the power supply side are not suitable, should be far away.
Switch Power Supply preferred, high power, high efficiency. However, low-voltage, low-voltage, and low-power
Simple routing and low cost, suitable for small current applications. Due to the resistor partial pressure, the power consumption is high. Both 3.3v and 1.8v are produced in 5 V mode.
It seems inappropriate because the pressure difference between 5 V and 1. 8 V is great, so the power consumption is also high. We recommend that you generate 3.3 V from 5 V and 1.8 V from 3 V.
If the power-on sequence needs to start at 1.8v, the diode delay can be used to meet the power-on sequence requirements. Feeling given by 3.3v
The power supply of 1.8v should not be too heavy, and the 3.3 V drop-down can drive the entire board.

================
* Up/down resistor *
================
The overall feeling is that the drop-down on this board is relatively weak. If the 10 k resistor is used for pulling up, the maximum voltage is 0.33 mA in the case of 3.3v voltage.
Current, the load is a little heavy, and the pulling will definitely fail. We recommend that you use 4.7 K for pull-up and 1 K for pull-down. This is a strong drop-down circuit.
High Signal-to-Noise Ratio and good stability. If a smaller resistance value is displayed on the drawing, such as the 510 euro drop-down, the 1 K resistance is not supported.
Reliable drop-down, select the resistance with a small resistance. The power consumption is proportional to the square of the voltage and inversely proportional to the resistance, reducing the power consumption.
The consumption mainly depends on step-down and frequency reduction. The impact of K and 1 K resistance on power consumption can be tolerated, which is the cost of improving stability.
.
Some of the board is directly connected to the power supply/ground, without any throttling resistance, this approach is more dangerous, once
Current reverse irrigation/overcurrent, the consequences are unimaginable. For example, 8019, LCD, 74hc595 are directly connected.
Some pins of 8019 are suspended. For CMOS circuits, the input and output must not be left blank; otherwise, latches will occur.
The device is burned out. If there is a default internal pull-up or pull-up, in principle, it is regarded as not existent. Because it is not easy to make electricity inside the chip
The resistance made by the transistor/FET is too large and inaccurate. In principle, the reliability should be guaranteed by the external circuit and cannot be
It is too dependent on the default circuit provided by the chip.

============
* Serial circuit *
============
The DB9 encapsulation used by the two serial ports on this board is outdated. It is too large. The current situation of DB9 cancellation on the laptop is as follows:
Is the best proof. The popular serial port encapsulation is RJ45, which is often used by foreigners. Can be connected to all modem strings
The port has nine pins, and the RI can be removed, because the current modem has an automatic response function and No Ri is required,
The remaining 8 pins can be transmitted using RJ45's 4 pair twisted pair wires. If it is a 3-line serial port, then an RJ45 is more
Two serial ports at the same time. RJ45 is half the size of DB9, and the price is cheap. It does not need to be differentiated between the male and anti-insertion, and the crystal head.
With the self-locking function, the connection is convenient and reliable, especially suitable for embedded applications, and helps reduce the area of the Board. Why not !?
Easyarm2200 serial port has no hot swapping protection circuit and is not suitable for industrial applications. The matching string line of this board is very short.
The 232 drive circuit generally provides 20 kV ESD Protection, which may not cause problems during the experiment, but at the industrial site,
The serial line is usually 15 meters or longer. At this time, static electricity accumulation and hot swapping are all prominent, with no additional protection.
The serial port will definitely become invalid due to the locks. There are always frequent problems, and the cost for after-sales service will affect the profit.
. We recommend that you add a sense of resistance protection circuit to prevent serial port burning.

==========
* Plugin *
==========
Sometimes, a single board works normally and several boards are not normally connected together. It is often because the plug-in layout is unreasonable.
. This board does not seem to consider the issue of plug-in layout. For example, the two sides of the clock line and the opposite side should be the ground, high pressure
It is separated from the low-voltage power supply. The signal line must be separated from the power supply, and the power supply must be near the ground or low-speed signal. This board where
It is a very professional place where standard connectors are used (such as CF card, IDE interface, JTAG interface, and pack interface ).
There is a problem with the place defined by myself. For example, J5 arranged a signal line of listen 25 instead of the ground on the opposite side of + 5 V, and J4 switched to + 5 V.
It is far from the ground, forming a large loop area, which interferes with others and is easily disturbed by others. The correct method is + 5 V.
The location can also separate the 5 V power supply from limit 29.
Only one pin is used to output the power supply to the outside. It seems that the current is not enough, because it seems that all the electrical fields on the current board Use cross flowers.
When the disk is connected, the current is smaller. We recommend that you use a few more pins to connect to the power supply.
Why are there so many connections between USB and board connection? It seems better to connect unused ports to the ground. We recommend that you increase the number of 3.3v
And 3 V away from other signals.

==========
* Transmission line *
==========
The impedance matching of the 10 m network port seems to be incorrect. The source end matches the device with the nearest source end, and the terminal matches the device with the nearest terminal.
Device. Differential line should be near and equi-long, single 50 euro, double 100 euro, line width and line spacing should be based on the dielectric constant of the Board
, Thickness and feature impedance calculation.

======
* Clock *
======
The 20 m crystal of 8019 is close to the edge of the board. It is recommended that the crystal be placed in the Board.
The crystal has poor performance than the crystal oscillator, and the price is gradually approaching. If possible, try to use the crystal oscillator.
The built-in PLL of the CPU is certainly not better than the separate PLL chip. First, the PLL manufacturer must be more effective than the CPU manufacturer in the PLL aspect.
Professional, second, the PLL integrated in the CPU is small in area and difficult to design. It is best to use an integer to increase the frequency of PLL.

============
* Server Load balancer *
============
The D0-D7/A0-A7 of the CPU drives 5 devices: 8019, USB, SRAM, Flash, LCD, it seems that the load is too heavy,
Generally, TTL can directly carry 8 loads. Generally, 6 is used, and the load capacity of CMOS devices is weaker. Therefore, TTL should be reduced as appropriate. Recommended
The Level Transmitter 74lvc4245 converts the level between the 3.3v and 5v CMOS devices, instead of the resistor boost. LCD,
It is best to add a power driver before connecting the CF and IDE cables.

======
* Efficiency *
======
Although using gpio to connect to IDE/CF can reduce the load on the CPU data line and address line, the efficiency is too low. Suggestions
The decoder circuit and DMA part are added using CPLD to improve the throughput efficiency of Block devices.

==========
* Watchdog *
==========
In principle, you cannot monitor yourself. Strictly speaking, you cannot use the wdt hardware that comes with the CPU. Highest reliability requirements
It is easy to use external dogs, and the CPU and dog should be kept away as far as possible, not in the same environment.

============
* Other problems *
============
On page 1 of Basic Experiment tutorial 1, JTAG reset and power-on Reset form a "line and" relationship, which should be"
Line or ". Wireor lineor. You can use the Chinese or English keywords of "line" to find useful materials.
Any information found by the line and keyword is an incorrect document. Leakage-level open or open collector output can be directly
When connected together, the pull-up resistor can be used to achieve the "line" or "function. Why is the relationship clearly "line" or "? Because
For example, what we call a signal refers to the signal before the OC/OD gate is driven. The OC/OD gate is a Inverter with power amplification.
Function. If the signal after the drive is in the relation with, then according to the Boolean logic, the two signals are in the relation with the reverse signal.
Are these two signals in the OR relationship.
The same error is also found on page 54 of USB driver development, "background ISR (Interrupt Service Program) and foreground Main Program Loop
Between. ISR is the foreground, and the main loop is the background.

In the Basic tutorial, when uart1 is described on page 209, it is called the modem interface. At this time, it is interpreted as sending a request;
CTS can be interpreted as clearing and sending; DTR --- data terminal ready; DSR --- data device ready, it is not appropriate.
RTS/CTS/DTR/DSR is the RS232 standard, which was developed by EIA a long time ago. Modem is redefined by heshi, and there are 232
There is no relation at all. In 232, RTS/CTS is used for half-duplex transmission and receiving switching, or full-duplex hardware throttling;
The modem is only used for hardware throttling or does not need to be used. There is also some meaning of request/clearing. In modem, DTR is
Set DTE to valid when preparing dial-up, and DSR to be valid after modem is ready. When these names are getting different from the earliest definition of them
This is mainly because the early 232 was used for the telex typewriter, and later used for DTE and DCE connections, and then evolved
Asynchronous Serial Port is now a universal asynchronous serial transceiver UART. In short, people do not want to add new IO ports for computers.
As a result, there are more and more types of original serial port access devices, resulting in confusion in understanding. Example: UART chip on the zhougong website
The speed has reached dozens of megabytes, which is no longer the 232 standard. We recommend that you describe the literal description of the pin name when talking about modem. No
Suitable for modem. Otherwise, it is hard to understand how to use the 232 standard pin name when talking about the serial port of the He's standard modem.

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※Source: · Shui Mu community http://newsmth.net · [from: 61.149.56. *]
 

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