In makefile: =? ==== Difference and condition execution

I. In makefile, we often see obj-M: = scull. O and kerneldir? =/Lib/modules:

= Is the most basic assignment.
: = Is to overwrite the previous value
? = Is to assign the value after the equal sign if it has not been assigned a value.
+ = Is the value after adding the equal sign

Example:

1. "="

Make expands the entire makefile before deciding the value of the variable. That is to say, the value of the variable will be the last value specified in the entire makefile. Example:

X = foo
Y = $ (x) bar
X = xyz

In the preceding example, the value of Y is xyz bar, not Foo bar.

2. ": ="

": =" Indicates that the value of a variable depends on its position in makefile, rather than the final value after the entire makefile is expanded.

X: = foo
Y: = $ (x) bar
X: = xyz

In the preceding example, the value of Y is foo bar, not XYZ bar.

Ii. Condition judgment

Example:

Judge the variable "cc". If the value is "GCC", use the library "libgnu. So" or "libgnu. A" for program connection; otherwise, no library is linked.

foo: $(objects) ifeq ($(CC),gcc)$(CC) -o foo $(objects) $(libs_for_gcc)else$(CC) -o foo $(objects) $(normal_libs)endif

In the preceding example, three keywords are used in the condition statement: "ifeq", "else", and "endif ". Where:

1. "ifeq" indicates the start of the Condition Statement and specifies a comparison condition (equal ). The two parameters enclosed in parentheses and separated by commas (,) are separated by spaces. The variable reference in the parameter is expanded when the variable value is compared. After "ifeq", it is ignored when the condition meets make and the condition is not met.

2. "else" is the execution part when the condition is not met. Not all condition statements require this part.

3. "endif" indicates the end of a condition statement. Any condition expression must end with "endif.

Keyword 1: ifeq

We usually use it to determine whether the value of a variable is null (not any character ). The parameter value may be obtained by referencing a variable or function. Therefore, during expansion, the parameter value may contain null characters (spaces, etc ). In this case, we usually use the make "Strip" function (refer to the text processing function Section) to process it and remove the null characters in the variable value. Format:

 Ifeq ($ (Strip $ (FOO )),)

Text-if-empty

Endif

In this way, there are several leading and trailing spaces in "$ (FOO)". When makefile is parsed by make, "text-if-empty" will also be used as part of the execution.

Keyword 2: ifneq

'Ifneq (arg1, arg2 )'

The condition judgment statement implemented by the keyword "ifneq" is opposite to "ifeq. Replace and expand "arg1" and "arg1" to compare their values. If the conditions are not the same (true), true is used as part of the make statement. Otherwise, false is used as part of the make statement.

Keyword 3: ifdef

The keyword "ifdef" is used to determine whether a variable is defined. Format:

'Ifdef variable-name'

If the value of the variable "vaeiable_name" is not empty, the expression is true and "text-if-true" is used as part of the make operation. Otherwise, the expression is false. If "text-if-false" exists, use it as part of make. When a variable is not defined, its value is null. "Variable-name" can be a reference to a variable or function.

For "ifdef", it must be noted that:Ifdef only tests whether a variable has a value. It does not replace and extend the variable to determine whether the value of the variable is null. For the variable "variable-name", except for "variable-name =", other definitions of the variable will make "ifdef" Return true. That is to say, even if we add a null value to it through other methods (for example, defining its value to reference other variables), "ifdef" will return the truth. Let's look at an example.:

Example 1:

Bar =

Foo = $ (bar)

Ifdef foo

Frobozz = Yes

Else

Frobozz = No

Endif

Example 2:

 

Foo =

Ifdef foo

Frobozz = Yes

Else

Frobozz = No

Endif

 

The result in Example 1 is "frobozz = yes", and in example 2 is "frobozz = No ". In example 1, the variable "foo" is defined as "foo = $ (bar )". Although the value of the variable "bar" is null, the result of "ifdef" is true. Therefore, when we need to determine whether the value of a variable is null, we need to use "ifeq" (or "ifneq") instead of "ifdef ". See the content of the first two sections.

Keyword 4: ifndef

The function implemented by the keyword "ifndef" is the opposite of "ifdef. Format:

'Ifndef variable-name'

This is not discussed in detail. Its function is to implement the condition judgment opposite to "ifdef.

 

In theConditional-DirectiveThis line can start with several spaces, which will be ignored during make processing. But it cannot start with the [Tab] character (otherwise it is considered a command ). In a condition judgment statement, multiple spaces or [Tab] characters can be used in any place except for the keyword (including "endif") and the parameter of the condition expression, it does not affect the function of the condition judgment statement. You can also use comments at the end of the same line ("#" until the end of a line ).

"Else" and "endif" are also part of the condition judgment statement. At the time of writing, they all have no parameters. They can end with multiple spaces (and cannot start with a [Tab] character) or [Tab] characters. The end of a line can also contain comments.

When make reads the MAKEFILE file, it calculates the expression value and determines the part of the statement to be executed as the makefile based on the expression value (select a qualified statement ). Therefore, automatic variables cannot be used in conditional expressions. Automatic variables are valid only when Rule commands are executed. A complete condition judgment statement cannot be written into two different makefile files. In a MAKEFILE file, the directive "include" contains another one.

In makefile: =? ==== Difference and condition execution