Introduction to the functions of ARM Neon intrinsics

ARM NEON Optimization. An Example


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#ifndef  __ARM_NEON__   #error  You must enable NEON instructions  ( E.g. -mfloat-abi=softfp -mfpu=neon)  to use arm_neon.h   #endif      /* (1), normal command: Generate the same size and type is usually the same as the operand vector;  (2), long instruction: Perform operations on the double-word vector operand, generating the result of a four-word vector. The resulting element is typically twice times the width of the operand element,  and belongs to the same type;  (3), wide instruction: a double-word vector operand and a four-word vector operand to perform the operation, generating four-word vector results. The elements that are generated and the first   operand are twice times the width of the second operand element;  (4), the narrow directive: four-word vector operands perform operations, and the resulting double-character vector results, the resulting element is generally half the width of the operand element;  (5), Saturation directive: When the range specified by the data type is exceeded, it is automatically restricted to that range. */     /******************************************************addition********************* /  /*--1, Vector add (normal command): vadd -> ri = ai + bi;  r, a, b have equal lane sizes--*/   int8x8_t vadd_s8  ( Int8x8_t __a, int8x8_t __b);//_mm_add_epi8   int16x4_t vadd_s16  (int16x4_t  __a, int16x4_t __b);//_mm_add_epi16   int32x2_t vadd_s32  (int32x2_t __a, int32x2_t __b);//_mm_add_ epi32   int64x1_t vadd_s64  (int64x1_t __a, int64x1_t __b);//_mm_add_epi64   //_mm_add_ps, sse, use only low 64 bits   float32x2_t  vadd_f32  (Float32x2_t __a, float32x2_t __b);   uint8x8_t vadd_u8  ( Uint8x8_t __a, uint8x8_t __b);//_mm_add_epi8   uint16x4_t vadd_u16  (uint16x4 _t __a, uint16x4_t __b);//_mm_add_epi16   uint32x2_t vadd_u32  (uint32x2_t  __a, uint32x2_t __b);//_mm_add_epi32   uint64x1_t vadd_u64  (uint64x1_t  __a, uint64x1_t __b);//_mm_add_epi64   int8x16_t vaddq_s8  (int8x16_t _ _a, int8x16_t __b);//_mm_add_epi8   int16x8_t vaddq_s16  (int16x8_t __a,  int16x8_t __b);//_mm_add_epi16   int32x4_t vaddq_s32  (int32x4_t __a, int32x4_t __b);// _mm_add_epi32   int64x2_t vaddq_s64  (int64x2_t __a, int64x2_t __b);//_mm_add _epi64   float32x4_t vaddq_f32  (float32x4_t __a, float32x4_t __b);//_mm_add_ ps   uint8x16_t vaddq_u8  (uint8x16_t __a, uint8x16_t __b);//_mm_add_epi8    uint16x8_t vaddq_u16  (uint16x8_t __a, uint16x8_t __b);//_mm_add_epi16    uint32x4_t vaddq_u32  (uint32x4_t __a, uint32x4_t __b);//_mm_add_epi32    uint64x2_t vaddq_u64  (uint64x2_t __a, uint64x2_t __b);//_mm_add_epi64   /*--2, Vector long add (long instruction): vaddl -> ri = ai + bi;  a, b have equal lane sizes,   Result is a 128 bit  vector of lanes that are twice the width--*/   int16x8_t vaddl_s8  ( Int8x8_t __a, int8x8_t __b);   int32x4_t vaddl_s16  (int16x4_t __a,  int16x4_t __b);   int64x2_t vaddl_s32  (int32x2_t __a, int32x2_t _ _b);   uint16x8_t vaddl_u8  (uint8x8_t __a, uint8x8_t __b);   uint32x4_t vaddl_u16  (uint16x4_t __a, uint16x4_t __b);   uint64x2_t  vaddl_u32  (uint32x2_t __a, uint32x2_t __b);  /*--3, Vector wide add (Wide instruction ): vaddw -> ri = ai + bi--*/   int16x8_t vaddw_s8  ( Int16x8_t __a, int8x8_t __b);   int32x4_t vaddw_s16  (int32x4_t __a,  int16x4_t __b);   int64x2_t vaddw_s32  (int64x2_t __a, int32x2_t _ _b);   UINT16x8_t vaddw_u8  (uint16x8_t __a, uint8x8_t __b);   uint32x4_t vaddw_u16   (Uint32x4_t __a, uint16x4_t __b);   uint64x2_t vaddw_u32  (uint64x2_t  __a, uint32x2_t __b);  /*--4, vector halving add: vhadd ->  ri =  (AI + BI)  >> 1;   shifts each result  right one bit, results are truncated--*/   int8x8_t vhadd_s8  ( Int8x8_t __a, int8x8_t __b);   int16x4_t vhadd_s16  (int16x4_t __a,  int16x4_t __b);   int32x2_t vhadd_s32  (int32x2_t __a, int32x2_t _ _b);   uint8x8_t vhadd_u8  (uint8x8_t __a, uint8x8_t __b);   uint16x4_t vhadd_u16  (uint16x4_t __a, uint16x4_t __b);   uint32x2_t  vhadd_u32  (uint32x2_t&Nbsp;__a, uint32x2_t __b);   int8x16_t vhaddq_s8  (int8x16_t __a,  Int8x16_t __b);   int16x8_t vhaddq_s16  (Int16x8_t __a, int16x8_t __b)    int32x4_t vhaddq_s32  (int32x4_t __a, int32x4_t __b)    uint8x16_t  vhaddq_u8  (uint8x16_t __a, uint8x16_t __b)    uint16x8_t vhaddq_u16   (Uint16x8_t __a, uint16x8_t __b)    uint32x4_t vhaddq_u32  (uint32x4_t  __a, uint32x4_t __b);  /*--5, Vector rounding halving add: vrhadd  -> ri =  (ai + bi + 1)  >> 1;   shifts  each result right one bit, results are rounded (rounded)--*/