JTAG interface Instruction Set

JTAG interface Instruction Set

 

The JTAG interface instruction set contains the following common commands:
Extest command
External test commands, which must be set to 0 and are forcibly defined by tap. This command initializes the external circuit test and is mainly used for board-level interconnection and off-chip circuit test.
The extest command connects the scan register BSR register to the TDI and TDO registers during shift-dr. In the capture-Dr status, the extest command loads the status of the input pin on the rising edge of the TCK into the BSR. The extest command never uses data in the input latches that are moved into the BSR, but directly captures data from the pins. In the update-Dr state, the extest command will drive the data in the lock-existing row output register unit down the TCK to the corresponding output pin.
Sample/preload command
Sampling/pre-loading command, which is forcibly defined by tap. In the capture-Dr state, the sample/preload command provides a data stream snapshot of the system logic from the pin to the chip, and the snapshot is extracted from the rising edge of the TCK. In the update-Dr status, the sample/preload command locks the data in the BSR register unit to the parallel output register unit, then, the extest command is used to drive the data in the lock-existing row output register unit along the TCK down to the corresponding output pin.
Bypass command
The bypass command must be set to 1 and the tap command must be defined. The bypass Command places a one-bit bypass register between TDI and TDO, so that the shift operation only goes through one-bit bypass register instead of many BITs (equal to the number of pins) the Boundary Scan register BSR improves the efficiency when testing chips other than the primary CPU connected to the same JTAG chain.
Idcode command
Read the CPU id command, which is forcibly defined by tap. This command connects the idcode register of the processor to between TDI and TDO.