MINIX3 Interrupt Handling

The interrupt controller is an integrated circuit that detects many of these electrical signals and generates a unique data format for them on the processor's data bus. PCs with 32-bit processors usually have two pieces of interrupt processing chips, each piece can handle 8 inputs, but one of them is from the slice, its output line is connected to the main slice of an input line, so that can hook up to 15 different external devices, such as the figure, in 15 input, some input is dedicated. For example. The clock input line (IRQ0) does not connect any slots that can be plugged into the new adapter.

The interrupt signal appears on the IRQN signal line on the right. The connector to the int pin of the CPU notifies the CPU that an interrupt has occurred. The INTA (interrupt response) signal from the CPU causes the controller chip that is responsible for the interrupt to place the data on the system bus and notifies the processor which service routine should be performed. The MINIX3 table contains 56 table entries, which actually use 35 items

21 of these items are reserved for future Intel processors or MINIX3 extensions.

When the CPU receives an interrupt during the run of a process, it creates a new stack for the server to interrupt. The position of the stack is determined by one of the task status segments (Tasks State Segment,tts). The CPU automatically presses several key register values into the new stack, including those registers that are used to restore the stack of the interrupted process itself and its program counters.

The interrupt service routine ends by switching back to the stack frame structure in the process table entry from the kernel stack, displaying a register value that pops out of the hardware stack, and executing a iretd (from interrupt return) instruction.

When an interrupt is received, the CPU shuts down all interrupts, thus ensuring that the stack frame of the process table entry does not overflow. This process is automatic, but there are assembly instructions that can be turned off and interrupted. When you use a kernel stack that is outside of a process table entry, the interrupt remains closed.

Privileged level control responds differently to received interrupts when running processes and executing kernel code. When a new stack is created for use while the service is interrupted, the hardware provides another service.