MSP430 Study Notes-ADC12

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MSP430 single-chip ADC12 module is a 12-bit precision A/D conversion module, it has high speed, versatility and other characteristics. As can be seen from the following ADC12 structural block diagram, the ADC12 module consists of the following components: input 16 analog switch, ADC Internal reference voltage source, ADC12 core, ADC clock source part, acquisition and hold/Touch Origin section, ADC data Output section, ADC control register, etc.

All registers of the ADC12 module

Adc12ctl0:

SHT1X: Sample hold time. Defines the relationship between the conversion timing and the sampling clock ADC12CLK in the register adc12mem8-15 conversion results.

sht0x: function Ibid., adc12mem0-7.

MCS:

REF2_5V: Internal reference voltage selection. Refon (Internal reference voltage generator control bit) must be placed.

0:1.5v;1:2.5v

adc12on:0: Close the ADC12 core; 1: Open the ADC12 kernel

Adc12ovie:adc12memx overflow interrupt allow bit.

Adc12tovie: Conversion time overflow interrupt allow bit.

ENC: The conversion allows bits.

ADC12SC: The meaning of adc12sc under different conditions

ADC12CTL1:

CSTATRADDX: You can define the first address of a word conversion or sequence conversion. Adc12mem0-adc12mem15 corresponds to 0-0FH.

SHSX: Sampling Trigger Source Selection

XX ADC12SC

Timer_a.out1

Ten Timer_b.out0

Timer_b.out1

ISSH: Sampling input signal direction control bit

ADC12DIVX: Clock source crossover Select bit

ADC12SSELX: Clock source Select bit. Adc12osc approx. 5MHZ (see Data sheet for details)

CONSEQX: Conversion Mode selection

ADC12BUSY:ADC12 busy flag bit. Only for single-channel single-pass mode, if the enc is reset, the conversion stops immediately, the conversion results are unreliable, and you need to test the ADC12BUSY bit before enc=0 to determine if it is 0. This bit is not valid in other conversion modes.

ADC12MEMX:

The 16-bit registers are used to store the ADC conversion results, using only the lower 12 bits, and the high 4 bits at readout 0.

ADC12MCTLX:

EOS: Sequence end control bit

0 sequence does not end; 1 The last conversion in this sequence

Srefx: Reference voltage source Select bit

INCHX: Select analog input Channel

Adc12ie:

adc12iex:0 disable the corresponding interrupt flag bit ADC12IFGX The interrupt request service that occurs when the position is set

1 Interrupt Request service that allows the corresponding interrupt flag bit ADC12IFGX to occur at the time of the position

ADC12IFG:

ADC12IFGX:ADC12MEMX Interrupt Flag bit

0 Adc12memx is visited

1 conversion ends, and conversion results are hard-loaded into the conversion memory

ADC12IV:

ADC12IVX:ADC12 Interrupt Vector

ADC12 is a multi-source interrupt: There are 18 interrupt flags (Adc12ifg0-adc12ifg15,adc12tov,adc12ov) but only one interrupt vector.

Routine 1:

p.0 Input single channel conversion, reference voltage AVCC,ADC12SC trigger conversion, sample hold Time is the ADC internal Clock Competition (16x), if a0>0.5avcc,p3.4 1, otherwise 0

Example 2

Repeats a sequence conversion to the AD0-AD3.

MSP430 Study Notes-ADC12