Oc8051 Software Programming

1. Reset

Reset through the reset pin rst input, the reset must reach two cycles of high level to reset the system. After the reset, the PC pointer is 0000 h, so the reset H is the Reset vector entry. After the reset, the program starts to run. After resetting, the p port (P0, P1, P2, P3) is set to FFH, the stack pointer value is 07 h, and the initial values of other special function registers are 00 H, the internal RAM value is not affected by the reset. After the reset, the value is uncertain.

2. Register list

Figure 1 shows the oc8051 register list:

　

Figure 1 oc8051 register list

The following describes several special function register functions in sequence.

Psw (program status word)

Cy ps00007: Carry flag

AC ps00006: Secondary carry flag

F0 ps00005: the user can be used as a general sign

RS1 rs0 (ps00004 ps00003): register group selection

00: register group 0 address range 00-07 h

01: register group 1 08-0fh

10: register group 2 10-17 h

11: register group 3 18-1fh

OV ps00002: overflow flag

-Psw.1: User-Defined flag

P psw.0: parity mark

　　

IE (Interrupt enabling)

　　

EA: total interruption enabling. Ea = 0. All interruptions are not responded. Ea = 1. the interruption is controlled by the independent enable positions of each interruption.

ET1: timer 1 interrupt enabling

Ex1: Enable External Interrupt 1

Et0: timer 0 interrupt enabling

Ex0: External Interrupt 0 Enabled

IP address (Interrupt priority)

　　

As mentioned above, oc8051 supports two levels of Interrupt priority: 0: The corresponding interrupt is a low priority, and 1: The corresponding interrupt is a high priority.

Pt1: timer 1 interrupt priority settings

Px1: External Interrupt 1 interrupt priority setting

Pt0: timer 0 interrupt priority settings

Px0: External Interrupt priority settings

　　

Tcon (Timer/counter control register)

　　

TF1: timer 1 Overflow sign, hardware slot, software clear 0

Tr1: timer 1 operation control, 1: Start Timer/Counter

Tf0: timer 0 overflow sign, hardware slot, software clear 0

Tr0: timer 0 Running Control, 1: Start Timer/Counter

Ie1: External Interrupt 1 along the mark, the External Interrupt edge is detected, the hardware is set to 1, after the interrupt response, the hardware clears 0

It1: External Interrupt type 1 control; 1: descent edge trigger; 0: Low Level Trigger

Ie0

It0: External Interrupt 0 type control, 1: descent edge trigger; 0: Low Level Trigger

 

Tmod (timing/Counter mode control register)

High 4bit control timer 1, low 4bit control timer 0.

Gate: gate = 0. The timer operation is controlled by the TRX bit (tcon register), and the gate = 1 is controlled by the external pin intx. When intx is 1, the timer can only run.

C/T: select the timing/counting mode and count the Tx input pins in the counting mode.

M1 MO: Mode Selection

00: 13bit Timer mode

01: 16-bit timed counting Mode

10: 8-bit auto-Reload timed counting Mode

11: two independent 8-Bit Timing counting modes. tl0 occupies the timer0 control line and the middle line, and th0 occupies the timer1 control line and the middle line. (in this case, the original timer 1 cannot be used, because the control line and the disconnection line are occupied)

 

3. Second Function Description of port P

The second function description of port P3 is displayed:

　　

The intx and TX pins mentioned in section 2nd are int0, int1, T0, and T1. In addition, P0 and P2 ports are also used to access external program memory. P0 indicates a low 8-bit address, and P2 indicates a high 8-bit address. If the address line is smaller than 8, P2 can also be unaddressable; p0 port is also used as the data input port returned by external program memory.

 

Oc8051 Software Programming