Openmsp IO Interrupt

IO Interrupt

Verilog FILE:OMSP_GPIO.V

1 //============================================================================2 //4) INTERRUPT GENERATION3 //============================================================================4 5 //Port 2 Interrupt6 //------------------7 8 //Delay input//  The p2in_dly stores former value of p2in, it'll be used for edge detection 9 Reg[7:0] p2in_dly;Ten  always@ (PosedgeMclkor PosedgePuc_rst) One   if(Puc_rst) p2in_dly <=8'h00; A   Elsep2in_dly <= p2in &P2_en_msk;  -  - //Edge Detection//Now we can detect rising and falling Edge easily by combining p2in and p2in_dly  the  Wire[7:0] P2in_re = p2in & ~p2in_dly; -  Wire[7:0] P2in_fe = ~p2in &p2in_dly; -  - //Set Interrupt Flag// p2ies Register decide which edge is Interrup signal; P2ifg_set are sent to P2IFG for Interru PT Flag  + AssignP2ifg_set = {p2ies[7] ? p2in_fe[7]: p2in_re[7], -p2ies[6] ? p2in_fe[6]: p2in_re[6], +p2ies[5] ? p2in_fe[5]: p2in_re[5], Ap2ies[4] ? p2in_fe[4]: p2in_re[4], atp2ies[3] ? p2in_fe[3]: p2in_re[3], -p2ies[2] ? p2in_fe[2]: p2in_re[2], -P2IES[1]? p2in_fe[1]: p2in_re[1], -p2ies[0] ? p2in_fe[0]: p2in_re[0]} &P2_en_msk; -  - //Generate CPU Interrupt// interrupt was generated when interrupt was enabled and P2IFG (Interrupt flag) is AVAILABL E  in AssignIrq_port2 = | (P2ie & P2IFG) & p2_en[0];

Assume p2_en is 1 ' B1, interrupt are enabled (p2ie=1), Interrupt edge is rising (p2ies=0), S o The code is as following:

1 //Delay Input2 Reg[7:0] p2in_dly;3  always@ (PosedgeMclkor PosedgePuc_rst)4   if(Puc_rst) p2in_dly <=8'h00;5   Elsep2in_dly <= p2in; 6 7 //Edge Detection8  Wire[7:0] P2in_re = p2in & ~p2in_dly;9   One //Set Interrupt Flag A AssignP2ifg_set = {p2in_re[7], -p2in_re[6], -p2in_re[5], thep2in_re[4], -p2in_re[3], -p2in_re[2], -p2in_re[1], +p2in_re[0]　　}; -  + //Generate CPU Interrupt A AssignIrq_port2 = | P2IFG;

　　

P2IFG Register is as following:

1 //P2IFG Register2 //----------------3 Reg[7:0] P2IFG;4 5  WireP2IFG_WR = p2ifg[0] ?REG_HI_WR[P2IFG]: REG_LO_WR[P2IFG];6  Wire[7:0] P2ifg_nxt = p2ifg[0] ? per_din[ the:8]: per_din[7:0];7  Wire[7:0] P2ifg_set;8 9  always@ (PosedgeMclkor PosedgePuc_rst)Ten   if(Puc_rst) P2IFG <=8'h00; One   Else if(P2IFG_WR) P2IFG <= (p2ifg_nxt | p2ifg_set) &P2_en_msk; A   ElseP2IFG <= (P2IFG | p2ifg_set) & P2_en_msk;

Assume p2_en is 1 ' B1;  P2ifg= ' h2b, so p2ifg[0]=1; P2ifg_set = 8{1 ' B1}

1  1 //P2IFG Register2  2 //----------------3  3 Reg[7:0] P2IFG;4  4 5  5  WireP2IFG_WR = reg_hi_wr[ +];//If decoded address is P2IFG and then write it into data6  6  Wire[7:0] P2ifg_nxt = per_din[ the:8];//receive high byte data from Openmsp7  7  Wire[7:0] P2ifg_set;8  8 9  9  always@ (PosedgeMclkor PosedgePuc_rst)Ten Ten   if(Puc_rst) P2IFG <=8'h00; One  One   Else if(P2IFG_WR) P2IFG <= p2ifg_nxt | P2ifg_set;//write into A  A   ElseP2IFG <= P2IFG | P2ifg_set;//Read out

Openmsp IO Interrupt