(Personal summary) usage of the make Tool

Source: Internet
Author: User

What is the make tool?

Compilation during DoSProgramThe compiler and the linker basically do not need any parameters. The command has only two partitions:

Masm xxx. ASM;

Link XXX. OBJ;

You only need to change XXX to % 1 in a batch, and then type ASM. Bat XXX in the command line to make it easy. Win32 programming is different. Both the compiler and the linker need to add the necessary options and the file list is also increased. For example, the command line parameters of the linker must list OBJ, Lib, res, def, and other files require more resource compilation. If batch processing is used, too many parameters need to be added, and each time you type a command in one line manually, that is a disaster for programmers. Of course, a simple solution is to create a batch for each programming project. After each change, run the batch processing to re-compile all the modules, but when the program is very large, it will take a long time. What should we do? In this case, make is used for maintenance.CodeWhen downloading the Win32 Assembly example program from the Internet, it is often found that *. ASM and *. in addition to the RC file, the example file package usually contains a MAKEFILE file, which is used by the make tool.

The Make tool can be regarded as an intelligent batch processing tool, which does not have the compilation and link functions, instead, it is compiled and linked by calling the user-specified commands in the makefile file in a way similar to batch processing. However, the batch processing will execute all commands to compile all the source files, including those that do not need to be re-compiled, the Make tool can automatically determine the source files to be compiled based on the last Compilation Time of the target file and the Update Time of the dependent source files, and will not process the files that have not been updated, in this way, the program debugging efficiency can be greatly improved.

For example, we need to write a test.exe file and generate the final executable file in four steps:

(1) Compile the source file x.asm, and use the header file common.inc. compile the file into X. OBJ through ml.exe;

(2) Compile the source file y.asmand use the header file common.incand y.inc. compile the file by ml.exe to Y. obj;

(32.16resource script file x.rc, which is compiled into X. Res by rc.exe;

(4)use linkto link x.obj,y.objand x.resto test.exe.

It can be seen that when the program is debugged, if the X. ASM, that is, X. OBJ file time ratio x. ASM is early, you need to repeat steps (1) and (4); If you modify y. ASM or Y. INC, then you need to re-Execute steps (2) and (4); if the modification is X. RC, the steps (3) and (4) must be re-executed; if the change is common. INC, because X. ASM and Y. ASM is related to it, so steps (1), (2), and (4) must be re-executed; if the common. INC and X. repeat all the steps. In this example, the file dependency is:

● Test.exe depends on X. OBJ, Y. OBJ, and X. Res;

● X. Res depends on X. RC;

● X. OBJ depends on X. ASM and common. Inc;

● Y. OBJ depends on Y. ASM, common. Inc, and Y. Inc.

Make can correctly judge the new and old files based on the file time and execute the corresponding steps. But how does make know the dependency between files? This must be specified using a description file. The makefile mentioned above is the description file. When the make tool is executed, it will use makefile by default to describe the file name for corresponding work, and there is a specified syntax for writing the description file, although the syntax is not very simple, it is much easier to write it.

The microsoftmaketool file is named nmake.exe, which is not part of the MASM package, but can be found in the bin directory of Visual C ++. The maketool file of borlandis make.exe, which is included in the tasm 5.0 toolkit. The default description file names of both are makefile, And the syntax of the description file is similar, but the command line parameters are somewhat different when used.

 

Nmake usage

In the command line, type nmake /? The help information is displayed. The nmake syntax is as follows:

Nmake [Option] [/F description file name] [/X output file name] [macro definition] [target]

Description:

●/F parameter -- if the description file name does not use the default makefile, you can specify it with the/F parameter.

●/X parameter -- if you want to save the screen output information to a file, you can use the/X parameter to specify it (the method of using the MPs queue operator nmake> file name under DOS is invalid ).

● Macro definition-you can overwrite the macro definition in the description file with a new definition.

● The target is to set up a file in the hosts file. The example contains the final test.exe file. You can also use nmake X. Res to update the X. Res file.

Common nmake options are shown in Table 2.8.

Table 2.8 common nmake options

Option

introduction

/A

force update of all files without detecting file time

/B

files must be updated when the file time is equal

/d

show new and old file information when making

/n

display the command to be executed during make, but not really executed

/P

A useful choice, make displays detailed information

Because nmake applications are based on the file time, when the computer clock is inaccurate or the file copy time to another computer is somewhat different, the file update may be incorrect, in this case, it is best to use the/A option to force all files to be updated. When using makefile as the name of the created description file, you can complete all the work simply by typing the nmake command without parameters.

 

Description File Syntax

The most important and basic function of the make tool is to describe the relationship between source programs and automatically maintain the compilation work through the description file. The description file needs to be compiled according to some syntax, the file must describe how to compile each source file and link it to generate an executable file, and define the dependency between the source files. To make it easier to use, some macro definitions can be used in the file at the same time. A description file generally includes the following content:

● Annotations

● Macro definition

● Explicit rules

● Implicit rules

Here, we first write a description file for the test.exe-related example in section 2.4.1, and then gradually introduce the writing Syntax of each part. For ease of use, the name of the description file is generally taken as the default file name: makefile. In this example, the MAKEFILE file is as follows (note that the line number in the brackets is not the real content of the file ):

(001) # nmake tool description file example

(002) EXE = test.exe # specify the output file

(003) objs = x. OBJ \

(004) Y. OBJ # target file

(005) RES = x. Res # required resource file

(006)

(007) link_flag =/subsystem: Windows # Link options

(008) ml_flag =/C/coff # compilation options

(009)

(010) # define dependencies and execute commands

(011) $ (exe): $ (objs) $ (RES)

(012) link $ (link_flag)/out: $ (exe) $ (objs) $ (RES)

(013) $ (objs): Common. inc

(014) Y. OBJ: Y. inc

(015)

(016) # define the default rules for compilation and resource Compilation

(017). ASM. OBJ:

(018) ml $ (ml_flag) $ <

(019). Rc. Res:

(020) RC $ <

(021)

(022) # Clear temporary files

(023) clean:

(024) del *. OBJ

(025) del *. Res

1. Comments and line breaks

The comments in makefile start with # and end with the line. When the nmake tool processes these characters, it will completely ignore # And all its subsequent characters.

When the content of a row is too long, you can use a line break to continue. The line break of makefile is \. For example, the third and fourth rows in the example can be merged:

Objs = x. obj y. OBJ # target file

When using line breaks, note that no other characters, including comments and spaces, cannot be added after "\". Otherwise, nmake detects that "\" is not at the end of a line, it will not be interpreted as a line break, resulting in an error.

2. macro definition

Makefile allows you to use a simple macro definition to refer to the source file and its related compilation information. You can call a macro as a variable. In the entire description file, the macro definition is used as long as the row that conforms to the following syntax:

Variable name = variable content

For example, rows 2nd to 8th in the above example file are macro definitions. When referencing a macro, you only need to add the $ symbol before the variable, but note that if the variable name length exceeds one character, parentheses () must be added for reference. The following are valid macro references:

$ (Link_flag)

$ (Exe)

$

$ ()

The last two references are exactly the same.

The use of macro definition can make makefile more flexible: First, you can make the file easy to modify. For example, you can write the options in rows 8th and 18th as macro definition, to change the compilation options in the future, you only need to change the macro definition directly in the MAKEFILE file header. You do not have to read and modify the entire MAKEFILE file. Second, when you use more than one file, defining a file name as a macro definition can reduce errors, increase readability, and facilitate modification. The biggest advantage is that the new macro definition can be overwritten directly in the command line, for example, typing in the command line:

Nmake ml_flag = "/C/COFF/FL"

Then, the/C/COFF/FL definition defined in makefile will be replaced with the new/C/COFF/FL definition. In this use, pay attention to two problems: first, macro names must be case-sensitive. ml_flag and ml_flag are different. Second, they must be enclosed by double quotation marks when there is space in the definition value. (double quotation marks are not required if there is no space, such as ml_flag =/C), which makes it unnecessary to modify the makefile when using different parameters to compile files temporarily.

3. explicit rules

Makefile contains rules that define dependencies between files and generate commands. The format of a rule is as follows:

Target file: Dependent file; command (method 1)

Or

Target file: Dependent file (method 2)

Command

The rule definition and command line cannot contain comments. In the example, after the macro definition is expanded in rows 11th and 12, the macro definition is:

Test.exe: X. obj y. obj x. Res

Link/subsystem: Windows/out: test.exe X. obj y. obj x. Res

The target file named cmdtest.exe is dependent on the three files X. OBJ, Y. OBJ, and X. res. If necessary, the command to generate the target file is the following link command. The rule can be implemented in two ways. When method 2 is used, the command can start from the second line and the ";" in the first line is omitted. However, a Tab character must be added before the command, otherwise, nmake cannot distinguish whether it is a command or another definition.

In the same rule, there can be multiple target files, multiple dependent files, and multiple command lines, of course, this must be defined using the second method. Otherwise, multiple commands cannot be written in the same line.

We can also use a method similar to the method in the above example to define other rules, such as the generation method of X. OBJ or X. res. But how does nmake know which file is the final file to make? Therefore, we must put the final file to be generated in the first rule definition. Of course, you can specify the target to make in the nmake command line parameter. For example, we only need to generate X. res file, you do not have to modify makefile to convert X. move the res description rule to the beginning, but directly type the following command on the command line:

Nmake X. Res

The parameter can also contain several target file names. nmake will process them one by one. If the specified target file does not have corresponding rules, nmake will return an error message:

Fatal error u1073: Don't Know How To Make 'xxx file'

When the user asks nmake to build a target, make will find the dependency rule for this target. In this case, the commands defined in the rule will not be executed immediately, but will first do something: nmake first checks whether the dependent file is the target file of another rule. If yes, it first processes this rule. If not, nmake checks the time of each dependent file, check whether these files are newer than the target file. If not, nmake will decide not to re-build the target file and prompt: 'xxx file' is up-to-date, if the dependent file is newer than the target file, the command is executed.

Therefore, all target files, their dependent files, and dependent files will be checked and updated in one order. In short, the creation of a target file contains a command link with the correct sequence. The link structure is tree-like, the target file is the root, and can be extended to multiple files at a level, we need nmake to create the file at the root of the link. nmake will start from the target to the initial state based on the link structure, and then return slowly, in this process, execute the command necessary to create each file until the final target is established.

The target can also have no dependent files, and the target can not be a real file. For example, clean in rows 23rd to 25th is a target, but we do not need to generate a clean file, instead, we want to use nmake to clear temporary files after file debugging. When we type nmake clean, the file is not clean in the working directory, nmake will execute the command in the clean definition, because nmake regards every non-existent target as an outdated target, so that the files in the intermediate process will be deleted *. OBJ and *. res.

The rules that indicate the full name of the target file are called explicit rules, but the compilation methods of some types of files can be the same. For example, commands that generate OBJ files from the ASM file always use ml, commands that generate res files from RC files always use RC. Writing a rule for each file is redundant. In this case, implicit rules are used.

4. implicit rules

Implicit rules can indicate the commands created for a certain type of files. They specifically define how to convert a file with a specific extension to a file with another extension. The defined format is:

. Source extension. Target Extension:; command (method 1)

Or

. Source extension. Target Extension: (method 2)

Command

The syntax of implicit rules is similar to that of explicit rules. They are also separated by ":". You can write commands under ";" instead of ";". Similarly, add a Tab character before the command.

Implicit rules cannot have dependency files, so ":" There is no content in the following example. Lines 17th and 18 in this example define the implicit rules for creating OBJ files from the ASM file, lines 19th and 20 define the implicit rules for creating res files from RC files. The explicit rules cannot specify a specified input file name, because the input file name refers to a full-class file with the same extension, several special preset macros are used to specify the file name. These macros are $ @, $ *, $? And $ <. Their meanings are as follows:

● $ @ -- Target file in the full path.

● $ * -- Remove the target file from the full path of the extension.

● $? -- Names of all source files.

● $ <-- Source file name (can only be used in implicit rules ).

Therefore, when RC $ <in rows 19th and 20 is used for X. RC, rc x. RC is used, and rc y. RC is used for Y. RC.

The reader can notice that some explicit rules do not have command lines, such as "$ (objs): Common. INC indicates that all OBJ files depend on common. inc file, "Y. OBJ: Y. inc. in addition to the 13th rows rule, OBJ also depends on Y. inc. However, none of the rules in line 13th and line 14th indicate the command to generate these OBJ files, so nmake will find the command line in the implicit rule during processing, finally, these OBJ files will be generated using the "ML $ (ml_flag) $ <" command in line 18th.

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