Questions about resetting initial values

Source: Internet
Author: User

Today, I am arguing with Shi Ge about the assignment of Reset values and definitions. I am deadlocked and cannot think of the true "oo" without a dual hero: "no code, no truth. Use code to describe the problem

The test code creates a sub-generator:

 1 //date: 2014/09/15 2 //version : Quartus II 14.0 3 //designer : pengxiaoen  4 //function : check reset  5  6 module reset_test  (clock , 7                     reset , 8                     in_a , 9                     in_b,10                     in_c,11                     ou_d12                     );13   input clock ,reset ; 14   input [3:0] in_a ,in_b ,in_c; 15   output reg [5:0] ou_d ; 16   17   reg [4:0] temp ;//=5‘d2 ;18   19   always @ (posedge clock)20     if(!reset)21         ;//temp <= 5‘d0 ; 22     else 23         temp <= in_a + in_b ;24         25         26     always @ (posedge clock)27         if(!reset)28             ou_d <= 6‘d0  ;29         else 30             ou_d <= temp + in_c ; 31             32  endmodule 

 

Two values are assigned to temp in this Code. The following figure shows the RTL illustration. The first thing we can see is the temp <= 5'd2 operation in reset.

 

Next, let's look at the figure with the definition initialized as 1.

As you can see, quartusi 14.0 does not support definition initialization.

This reminds me that I used Modelsim to create an M sequence project. M sequence numbers are stored with a Reg, which is assigned a value during initialization.

When I found out that DU Niang had a question and encountered the same problem as me, some people finally proposed that the definition assignment should be supported by the synthesizer -- meaning that q14.0 does not support definition assignment initialization, however, Modelsim-Altera is supported. They also support reset value assignment initialization. Therefore, we do not recommend that you use the definition assignment initialization method.

 

Questions about resetting initial values

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