"Go" PC Architecture series: Cpu/ram/io Bus development history!

1. Start with the IBM PC XT architecture ...

In the first PC design, the Cpu/ram/io is connected by a bus, and all the parts must work under synchronous mode, and the other devices determined by the CPU work at what frequency (Frequency). This brings an "interlock" (Locked to every other)effect, that is, everyone is limited to a universal clock frequency that all devices can withstand (clock Frequency), the overall performance of the system is not high.

2. First slice of the bus



In 1987, Compaq (Compaq) thought of a way to separate the system bus from the I/O bus, allowing 2 different buses to operate on different clock frequencies. The CPU and memory still work on their own public bus (the System bus), independent of all I/O devices, allowing high-speed cpu/ram components to get rid of low-speed I/O devices.

The bridge here is what we are talking about.(South Bridge)the predecessor of the chip, and here can see Bridge actually played a function of reducing frequency (let me think of the AMD K8 CPU crossover mechanism, this will be in detail with you later).

3. The advent of CPU multiplier



From 80486 onwards, the rapid development of the CPU, the frequency has risen sharply, the memory began to become less than the pace of development of the CPU! Intel then decided to introduce the concept of octave (Clock doubler) in 80486! The memory is still working on the system bus, and the same operating frequency as the system bus, and the actual internal operating frequency of the CPU (which is what we often say CPU frequency) is:

CPU frequency = FSB (System bus frequency/system bus Frequency) * Octave (Clock doubler)
CPU frequency = MHz * 2 = MHz

For example, Intel P4 2.8C is: @ + MHz * = 2800 MHz = 2.8 GHz

4. The advent of North Bridge chip/front-end bus


from the previous points, we can see that the trend of PC structure change is to isolate the slow device and the speed device by cutting the bus. And this developed to later, finally evolved out of the North Bridge chip! The bus between the memory and the North Bridge is called the memory bus, the bus that connects between the CPU and North bridges becomes the front bus (Front Side BUS,FSB), which is the system bus.

Thanks to Intel'sQDR (Quad Data rate) technology, the Pentium 4 CPU can transmit 4 data per clock cycle, so when the FSB is operating at a frequency of three MHz, the FSB is equivalent at 200MHZ * 4 = MHz!

Note: Often said FSB 800, is actually the FSB equivalent frequency, not the FSB actual of the Working frequency!

Original address: http://blog.csdn.net/xport/article/details/1387928

"Go" PC Architecture series: Cpu/ram/io Bus development history!