S5PV210 Study Notes-Nand Configuration

The Nand flash configuration of S5PV210 is similar to that of Nand flash of 2440 and 6410. The difference is that S5PV210 is more powerful, especially the hardware ECC of S5PV210 (this article does not involve the Nand ECC configuration in S5PV210 ). In general, S5PV210's Nand flash configuration is still very simple. In fact, configuring a module usually requires the following steps: (1) According to the schematic diagram, clarify the module wiring mode. For Nand flash, it is to see which GPIO the Nand flash receives, then configure the corresponding GPIO as the Nand function. (2) read the S5PV210 manual and master the functions, operation methods, and register configurations of the related module controller. (3) read the module chip manual and master the access control timing of the module. We configure the module GPIO according to the above steps. My Development Board is TQ210 and the Nand flash chip is K9K8G08U0B. The wiring methods are as follows: (1) Xm0FRnB0 ~ Xm0FRnB3, Xm0FCLE, Xm0FALE, Xm0FWEn, and Xm0FREn are connected to MP0_3. Check the MP0_3 control register and set MP0_3CON to 0x22222222. (2) Xm0CSn2 ~ Four Xm0CSn5 scripts are connected to 2 ~ of MP0_1 ~ 5 feet, so the 8 ~ of MP0_1CON ~ The 23-bit value should be set to 0x3333; (3) Xm0DATA0 ~ Xm0DATA7 is connected to MP0_6, so MP0_6 should be configured as 0x22222222. In this way, after the GPIO is configured, We will configure the Nand flash control register, after a general view of the Nand flash register function, we can find that if we do not use the ECC function, we can configure only the NFCONF and NFCONT registers. Our Nand flash is an SLC-type Nand, the Page size is 2048, And the write address needs to be 5 cycles (these can be easily found in the Nand flash chip manual). Therefore, NFCONF should be configured as follows: NFCONF = (3 <23) | (1 <12) | (2 <8) | (0 <4) | (1 <1); // ECC, TACLS, TWPRH0, TWPRH1, SLC, 2 K, 5 cycles. Among them, TACLS, TWPRH0 and TWPRH1 need to be determined by reading the manual. Teacher Wei Dongshan told me about the confirmation method. However, when I configure them completely according to the minimum time set in the manual, I cannot access them normally, I tried it myself. I first set all three parameters to 7, then gradually reduced them, and finally set them to 1, 2, and 0, however, this is not necessarily the most stable. Generally, a slightly larger value will be more stable. However, in order not to affect access efficiency, this value cannot be too large. Set it according to the minimum condition first, increase the parameter value when a read error or other Instability occurs. Then there is the NFCONT register, and the configuration of NFCONT is simpler. If we do not set ECC, we only need to set 0-bit and 1-bit: NFCONT = (1 <1) | (1 <0); // disable chip selection so that the Nand flash initialization function is as follows: [cpp] void nand_init () {NFCONF = (3 <23) | (1 <12) | (2 <8) | (0 <4) | (1 <1 ); NFCONT = (1 <0) | (1 <1); MP0_1CON & = ~ (0 xffff <8); MP0_1CON | = 0x3333 <8; MP0_3CON = 0x22222222; MP0_6CON = 0x22222222; nand_reset ();} As for nand_reset, A reset is usually performed after the Nand flash configuration is complete, so that the Nand flash is restored to its initial state. In this way, the Nand flash Initialization is complete, but you still need to perform operations on the access to the Nand flash according to the time sequence. When the Nand mode is started, you only need to perform read operations on the Nand flash. Therefore, here we only list several read-related operations: (1) Nand flash reset [cpp] static void nand_reset () {nand_select_chip (); nand_cmd (0xff); nand_wait (); nand_deselect_chip ();} (2) Nand flash write address [cpp] static void nand_addr (unsigned long page_addr, unsigned long page_offset) {NFADDR = (page_offset> 0) & 0xFF; NFADDR = (page_offset> 8) & 0x7; NFADDR = (page_addr) & 0xFF; NFADDR = (page_addr> 8) & 0xFF; NFADDR = (page_addr> 16) & 0x07;} (3) nand flash read ID [cpp] void nand_read_id (char id []) {int I; nand_select_chip (); nand_cmd (0x90); NFADDR = 0; for (I = 0; I <5; I ++) id [I] = nand_read (); nand_deselect_chip ();} (4) nand flash read page data [cpp] void nand_read_page (unsigned char * buf, unsigned long page_addr) {int I; nand_select_chip (); nand_cmd (0); nand_addr (page_add R, 0); nand_cmd (0x30); nand_wait (); for (I = 0; I! = PAGE_SIZE; ++ I) {* buf ++ = nand_read () ;}nand_deselect_chip () ;}the above are several important functions related to Nand flash read. Here, you can add the referenced small functions to perform normal Nand flash operations. I uploaded the code I wrote to my CSDN resources. If necessary, I can use it for reference. In addition, if you need to write code for Nand flash, refer to the Nand flash configuration section 6410 in my blog and the Nand flash chip manual. The principles are the same.