Settings of LCD _PCLK ON THE MSM7X Platform

In the original code, Pclk is set to 8 m, but for 320*480 LCD needs to be increased to about 10 m.
Therefore, you can directly modify the two parts in the bootloader and kernel.
Lcdc_clock_init (8000000 );
Pinfo-& gt; clk_rate = 8000000;

An error occurred while starting the download. The log is displayed as follows:
Can't set mdp lcdc pixel clock to rate 10000000

Ret = clk_set_rate (pixel_mdp_clk, mfd-> fbi-> var. pixclock );
If (ret ){
Pr_err ("% s: Can't set mdp lcdc pixel clock to rate % u \ n ",
_ Func __, mfd-> fbi-> var. pixclock );
Goto out;
}

Search for pixel_mdp_clk and then display
Pixel_mdp_clk = clk_get (NULL, "mdp_lcdc_pclk_clk ");
CLK_PCOM ("mdp_lcdc_pclk_clk", MDP_LCDC_PCLK_CLK, NULL, 0 ),
After checking this information, we found that clk uses RPC shared memory to call the settings on the arm9-end.

Find MDP_LCDC_PCLK_CLK in the arm9-segment. You can use this clk_regime_sel_mdp_lcdc_clk () function to set pclk.
Search all the way (this code is really depressing)
Boolean clk_regime_bsp_init (void) // assign a value to pclk
Clkrgm_bsp = & clkrgm_bsp_data; // pass the value
Clk_regime_bsp_load_mdp_lcdc_cfgs // pass the value of the array

Find the clkrgm_bsp_7627.c File
Clkrgm_bsp_msm_clk_1__type clkrgm_bsp_msm_1__mdp_lcdc []
{
// Add the pclk you want to use this function. Is this code really painful!
}

Author's "qq413187589 column"