Stm32-External Interrupt learning notes

Interrupt category

Stm32Exti ControllerSupported19 external interruptions/eventsRequest. Each interrupt has a status bit, and each interrupt/event has its own trigger and shield settings.
19 external interruptions of stm32 correspond19-way central disconnection, Which areEXTI_Line0-EXTI_Line18:

Line 0 ~ 15: the input of the corresponding external IO port is interrupted.
Line 16: connect to the PCIe output.
Line 17: connect to the RTC alarm event.
Line 18: connect to the USB wake-up event.

 Trigger Method: The External Interrupt of stm32 isTriggered by edge,Level Trigger not supported.

External Interrupt group:Stm32Each gpio can be configured as an external interrupt trigger source.Stm32 divides multiple interrupt trigger sources into different groups based on the serial numbers of the pins, such as pa0, pb0, pc0, pd0, pe0, pf0, and pg0, so we can get a total of 16 groups according to the stm32 rule that each group can only have one interrupt trigger source at the same time, the maximum number of tasks is 16 external interruptions.

Register Group

Exticr register group, 4 in totalBecause the registers in the compiler are numbered from 0Exticr [0] ~ Exticr [3] corresponds to exticr1 ~ in stm32 Reference Manual ~ Exticr 4 (it took a long time to understand the meaning of this array !!). Each exticr only uses 16 lower bits.

Exticr [0] ~ Exticr [3] is allocated as follows:

Structure of the exti register:

typedef struct {   vu32 IMR;   vu32 EMR;   vu32 RTSR;   vu32 FTSR;   vu32 SWIER;   vu32 PR; } EXTI_TypeDef;

IMR: interrupt shielding register

 

This is a 32 register. However, only the first 19 digits are valid. When the bit X is set to 1, the online interruption is enabled. Otherwise, the online interruption is disabled.

EMR: Event shielding register

Same as IMR, but this register is used to block and enable events.

Rtsr: Select register for triggering the rising edge

This register is the same as IMR. It is also a 32-bit register, which is only valid for the first 19 digits. If it is set to 1, the rising edge is allowed to trigger the interruption/event. Otherwise, it is not allowed.

Ftsr: Drop edge trigger Selection Register

The same as ptsr, but this Register sets the descent edge. The descent edge and the rising edge can be set at the same time, so that it becomes triggered at any level.

Swier: software interrupt event register

By writing 1 to the bit X of this Register, when IMR and EMR are not set, the corresponding bit in the Set PR is suspended. If IMR and EMR are set, an interruption occurs. The configured Swier bit will be cleared after the corresponding bit in PR.

PR: pending register

0 indicates that no request is triggered online.

1, indicating that an edge event is selected on the External Interrupt line. You can clear this bit by writing 1 to the corresponding bit of the register.

In the interrupt service function, it is often necessary to write 1 to the corresponding bit of the register to clear the interrupt request.

Ex_nvic_config is basically written according to this structure.

Interrupted configuration steps

Each IO port of stm32 can be used as the interrupt input, which is very useful. To use the IO port as an external interrupt input, follow these steps:

1) initialize the IO port as input.

In this step, set the status of the I/O port you want to use as the external interrupt input. You can set it to up/down, or set it to float input, but when float is empty, the external must be pulled or the drop-down resistance. Otherwise, interruption may occur. In the case of high interference, we recommend that you use an external pull/drop-down resistor to prevent the impact of external interference to some extent.

2) Enable the IO port to reuse the clock and set the ing between the IO port and the disconnection.

The External Interrupt configuration register exticr needs to be configured for the stm32 ing between the IO port of stm32 and the disconnection. In this way, we need to enable the reuse clock first, and then configure the ing between the IO port and the disconnection. In order to connect the external interrupt with the disconnection.
3) Enable the online interrupt/event corresponding to the IO port and set the trigger condition.
In this step, we need to configure the conditions for interrupt generation. stm32 can be configured to trigger a rising edge, a falling edge, or triggered by any level change, but cannot be configured to trigger a high level or a low level. Here we will configure it based on your actual situation. At the same time, you must enable the interruption of the online interruption. Note that if you use an external interrupt and set the EMR bit of the interrupt, the software simulation cannot jump to the interrupt, the hardware is acceptable. Without EMR, the software simulation can enter the interrupt service function, and the hardware can also be used. We recommend that you do not configure the EMR bit.
4) configure the interrupt group (Objective C) and enable interruption.
In this step, we configure the interrupt group and enable. For the stm32 interrupt, it can be executed only when the configuration of Objective C is configured and enabled, otherwise, it will not be executed in the interrupt service function. For more information about Objective C, see the previous section.
5) Write interrupt service functions.

This is the last step in interrupt settings. interruption of service functions is essential. If interruption is enabled in the Code but the interrupt service function is not compiled, hardware errors may occur, this leads to program crash! Therefore, after an interrupt is enabled, remember to write a service function for the interrupt. Write the interrupted operations in the interrupt service function.

Experiment 4 -- External Interrupt experiment exit. C function:

 

[CPP]View plaincopy

1. # Include "exti. H"
2. # Include "led. H"
3. # Include "key. H"
4. # Include "delay. H"
5. # Include "usart. H"
7. // External Interrupt 0 service programs
8. Void exti0_irqhandler (void)
9. {
10. Delay_ms (10); // deshake
11. If (key2 = 1) // press 2
12. {
13. Led0 =! Led0;
14. Led1 =! Led1;
15. }
16. Exti-> Pr = 1 <0; // clear the interrupt flag on line0
17. }
19. // External Interrupt 15 ~ 10 service programs
20. Void exti15_10_irqhandler (void)
21. {
22. Delay_ms (10); // deshake
23. If (key0 = 0) // press 0
24. {
25. Led0 =! Led0;
26. } Else if (key1 = 0) // press Key 1
27. {
28. Led1 =! Led1;
29. }
30. Exti-> Pr = 1 <13; // clear the interrupt flag on line13
31. Exti-> Pr = 1 <15; // clear the interrupt flag on line15
32. }
33. // Initialize the program for external interruption
34. // Initialize pa0, pa13, and pa15 as interrupt input.
35. Void extix_init (void)
36. {
37. RCC-> apb2enr | = 1 <2; // enable the Porta clock
38. Jtag_set (jtag_swd_disable); // disable JTAG and SWD.
40. Gpioa-> CRL & = 0xfffffff0; // set pa0 to input
41. Gpioa-> CRL | = 0x00000008;
42. Gpioa-> CRH & = 0x0f0fffff; // pa13, 15 set to input
43. Gpioa-> CRH | = 0x80800000;
44. Gpioa-> ODR | = 1 <13; // pa13 is pulled up. pa0 is pulled down by default.
45. Gpioa-> ODR | = 1 <15; // pa15 pull up
47. Ex_nvic_config (gpio_a, 0, rtio); // triggered by the rising edge
48. Ex_nvic_config (gpio_a, 13, Fourier); // triggered by descent edge
49. Ex_nvic_config (gpio_a, 15, Fourier); // triggered by descent edge
51. My_nvic_init (, exti0_irqchannel, 2); // preemptible 2, sub-Priority 2, group 2
52. My_nvic_init (, exti15_10_irqchannel, 2); // preemption 2, sub-Priority 1, group 2
53. }

 

 

Two functions:Ex_nvic_config (gpio_a, 0, rtio); AndMy_nvic_init (2, 2, exti0_irqchannel, 2)The two functions are defined in SYS. C and completed in steps 2, 3, and 4 respectively. The function prototype is as follows:

 

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1. // External Interrupt configuration function
2. // Only for gpioa ~ G; do not include the following:
3. // Parameter: gpiox: 0 ~ 6, representing gpioa ~ G; bitx: bit to be enabled; trim: trim mode, 1, bottom-up, 2, top-down, 3, triggered at any level
4. // This function can be configured with only one IO port and multiple I/O Ports at a time and needs to be called multiple times
5. // This function will automatically enable the corresponding interrupt and shield.
6. // Waiting for test...
7. Void ex_nvic_config (u8 gpiox, u8 bitx, u8 trim)
8. {
9. U8 extaddr;
10. U8 extoffset;
11. Extaddr = bitx/4; // obtain the number of the interrupt register group
12. Extoffset = (bitx % 4) * 4;
14. RCC-> apb2enr | = 0x01; // enable Io multiplexing of clock
16. Afio-> exticr [extaddr] & = ~ (0x000f <extoffset); // clear the original settings !!!
17. Afio-> exticr [extaddr] | = gpiox <extoffset; // exti. bitx ing to gpiox. bitx
19. // Automatically set
20. Exti-> IMR | = 1 <bitx; // enable line bitx interruption.
21. // Exti-> EMR | = 1 <bitx; // events on line bitx are not blocked (if this sentence is not blocked, it is acceptable on the hardware, but it cannot be interrupted during software simulation !)
22. If (TRIM & 0x01) exti-> ftsr | = 1 <bitx; // triggered by event descent along line on line bitx
23. If (TRIM & 0x02) exti-> rtsr | = 1 <bitx; // triggered when the event is raised along the upstream and downstream of line bitx
24. }

This function completes two steps:

 

2. Enable the IO port to reuse the clock and set the ing between the IO port and the disconnection.

3. Enable the online interrupt/time corresponding to the IO port and set the trigger condition.

 

[CPP]View plaincopy

1. // Set objective C
2. // Nvic_preemptionpriority: preemption priority
3. // Nvic_subpriority: Response priority
4. // Nvic_channel: interrupt ID
5. // Nvic_group: interrupt group 0 ~ 4
6. // Note that the priority cannot exceed the set group range! Otherwise, unexpected errors may occur.
7. // Group Division:
8. // Group 0-0 preemptible priority, 4-bit response priority
9. // Group: 1-bit preemption priority, 3-bit response priority
10. // The Group has two-digit preemptible priority and two-digit response priority.
11. // The group has three-digit preemption priority and one-digit response priority.
12. // Group 4-4 preemptible priority, 0-bit response priority
13. // The principle of nvic_subpriority and nvic_preemptionpriority is that the smaller the value, the higher the priority.
14. // Check OK
15. // 100329
16. Void my_nvic_init (u8 nvic_preemptionpriority, u8 nvic_subpriority, u8 nvic_channel, u8 nvic_group)
17. {
18. U32 temp;
19. U8 ipraddr = nvic_channel/4; // each group can only store four addresses.
20. U8 iproffset = nvic_channel % 4; // The offset in the group
21. Iproffset = iproffset * 8 + 4; // obtain the exact offset position.
22. My_nvic_prioritygroupconfig (nvic_group); // sets the group
23. Temp = nvic_preemptionpriority <(4-nvic_group );
24. Temp | = nvic_subpriority & (0x0f> nvic_group );
25. Temp & = 0xf; // retrieve four lower bits
27. If (nvic_channel <32) limit C-> Iser [0] | = 1 <nvic_channel; // enable the interrupt bit (if you want to clear it, the opposite operation is OK)
28. Else extends C-> Iser [1] | = 1 <(NVIC_Channel-32 );
29. Nvic-> IPR [ipraddr] | = temp <iproffset; // set the response priority and the disconnection priority.

 

This function is complete:

4. Configure the interrupt group (Objective C) and enable interruption.

 

In experiment 18 -- touch screen experiment, the interrupt initialization does not call this function. It is configured as follows:

 

[CPP]View plaincopy

1. My_nvic_init (2, 0, exti1_irqchannel, 2 );
2. RCC-> apb2enr | = 0x01; // enable Io multiplexing of clock
3. Afio-> exticr [0] | = 0x0020; // exti1 ing to pC1 (exti13 is incorrect in this atomic program)
4. Exti-> IMR | = 1 <1; // enable the interrupt on line1
5. Exti-> EMR | = 1 <1; // events on line1 are not blocked.
6. Exti-> ftsr | = 1 <1; // triggered by event descent along line1

RCC-> apb2enr | = 0x01, When do I need to enable the multiplexing clock?? The manual has the following paragraph:

 

That is to say, as long as the operationEvcr, exticrx, maprYou must enable the reuse function clock, that is, when you want to configure event output, external interrupt, and re-map of stm32, you must enable the reuse function clock.

Afio-> exticr [0] | = 0x0020; // ing exti1 to pC1

Set the interrupt ing in this sentence, as mentioned above: exticr [0] ~ Exticr [3] corresponds to exticr1 ~ Exticr4, for example:

Afio-> exticr [3] & = 0xffffff0f;

Afio-> exticr [3] | = 0xffffff0f; // exti13 ing to pa13. 0 (0x00) indicates a port, and 1 (0x01) indicates B port, and so on. 6 (0x0110) represents the G port.

Afio-> exticr [3] & = 0xffffff0f;

Afio-> exticr [3] | = 0xffffff2f; // exit13 ing to pc13, 2 (0x0010) represents the C Port

The Cause Analysis of External Interrupt functions cannot be performed in the following aspects:

1) The gpio or afio clock is not enabled;

2) The gpio does not match the configured interrupt line;

3) The interrupt trigger method does not match the actual trigger mode;

4) when the interrupt processing function is used as a database function, an error may occur. There may often be no underscores between numbers and letters;

5) when an external interrupt is triggered along an edge, it may not be able to detect the edge. For example, if a broken line is a low level (float input), the trigger is a descent edge trigger and may always be a low level, when the high level is the same, the level continues to be the high level;

6) No software interruption is used to trigger external interruptions. The exti_generateswinterrupt function is called because the software interruption is handled before the edge interruption.

Stm32-External Interrupt learning notes