Stm32 IO Operation header file specification

Source: Internet
Author: User

In Stm32 many project development, there are too many operations on Io, if set 1 or 0, using the functions provided by the official library is convenient, specification, but need to include the standard library, large size, but also to deal with different version compatibility issues, including IO initialization is too cumbersome, so the operation of atoms and other routines to streamline,

Initialization is as simple as this: for stm32f and stm32l

void Init_io (void)
{
Jtag_set (swd_enable);//Open SWD
rcc->apb2enr|=1<<6;//to enable peripheral Porte clocks first
rcc->apb2enr|=1<<5;//to enable peripheral PORTD clocks First
rcc->apb2enr|=1<<4;//to enable peripheral PORTC clocks First
rcc->apb2enr|=1<<3;//to enable peripheral PORTB clocks First
rcc->apb2enr|=1<<2;//to enable peripheral porta clocks First
rcc->apb2enr|=1<<0;//Turn on the auxiliary clock
Jtag_set (swd_enable);//Open SWD
//afio->mapr&=0xf8ffffff;//Clear MAPR [26:24]
//afio->mapr|=0x02000000;//setting JTAG mode


PORTC6~10 multiplexing push-pull output
gpioa->crl&=0xffff0000;
gpioa->crl|=0x00003333;
gpioa->odr|=0xffff;
PORTC Push-Pull output

Header file

#ifndef __stm32_io_h__
#define __stm32_io_h__

Taobao:ccjt.taobao.com
#include "STM3"
///////////////////////////////////////////////////////////////
Bit-band operation for 51 similar gpio control functions
Concrete realization Idea, refer to <<cm3 authoritative guide >> Fifth chapter (87 page ~92 page).
IO port Operation macro definition
#define Bitband (addr, Bitnum) ((Addr & 0xf0000000) +0x2000000+ ((addr &0xfffff) <<5) + (BITNUM&LT;&LT;2))
#define MEM_ADDR (ADDR) * ((volatile unsigned long *) (ADDR))
#define BIT_ADDR (ADDR, Bitnum) mem_addr (Bitband (ADDR, Bitnum))
#if defined (STM32L1XX_MD) | | Defined (STM32L1XX_HD) | | Defined (stm32l1xx_md_plus)
#define OFFSET_O 0x14
#define OFFSET_I 0x10
#elif defined (STM32F10X_MD) | | Defined (STM32F10X_HD) | | Defined (STM32F10X_XL) | | Defined (STM32F10X_CL)
#define OFFSET_O 0x0c
#define OFFSET_I 0x08
#else
#error "11222"
#endif
IO Port Address Mapping
#define GPIOA_ODR_ADDR (Gpioa_base+offset_o)//0x4001080c
#define GPIOB_ODR_ADDR (Gpiob_base+offset_o)//0x40010c0c
#define GPIOC_ODR_ADDR (Gpioc_base+offset_o)//0x4001100c
#define GPIOD_ODR_ADDR (Gpiod_base+offset_o)//0x4001140c
#define GPIOE_ODR_ADDR (Gpioe_base+offset_o)//0x4001180c
#define GPIOF_ODR_ADDR (Gpiof_base+offset_o)//0x40011a0c
#define GPIOG_ODR_ADDR (Gpiog_base+offset_o)//0x40011e0c

#define GPIOA_IDR_ADDR (gpioa_base+offset_i)//0x40010808
#define GPIOB_IDR_ADDR (gpiob_base+offset_i)//0X40010C08
#define GPIOC_IDR_ADDR (gpioc_base+offset_i)//0x40011008
#define GPIOD_IDR_ADDR (gpiod_base+offset_i)//0x40011408
#define GPIOE_IDR_ADDR (gpioe_base+offset_i)//0x40011808
#define GPIOF_IDR_ADDR (gpiof_base+offset_i)//0x40011a08
#define GPIOG_IDR_ADDR (gpiog_base+offset_i)//0x40011e08

IO port operation, only for single IO port!
Make sure the value of n is less than 16!
#define PAOUT (N) bit_addr (gpioa_odr_addr,n)//output
#define PAIN (N) bit_addr (gpioa_idr_addr,n)//input

#define PBOUT (N) bit_addr (gpiob_odr_addr,n)//output
#define PBIN (N) bit_addr (gpiob_idr_addr,n)//input

#define PCOUT (N) bit_addr (gpioc_odr_addr,n)//output
#define PCIN (N) bit_addr (gpioc_idr_addr,n)//input

#define PDOUT (N) bit_addr (gpiod_odr_addr,n)//output
#define PDIN (N) bit_addr (gpiod_idr_addr,n)//input

#define PEOUT (N) bit_addr (gpioe_odr_addr,n)//output
#define Pein (N) bit_addr (gpioe_idr_addr,n)//input

#define PFOUT (N) bit_addr (gpiof_odr_addr,n)//output
#define PFIN (N) bit_addr (gpiof_idr_addr,n)//input

#define PGOUT (N) bit_addr (gpiog_odr_addr,n)//output
#define PGIN (N) bit_addr (gpiog_idr_addr,n)//input
/////////////////////////////////////////////////////////////////
Ex_nvic_config Special Definition
#define GPIO_A 0
#define GPIO_B 1
#define Gpio_c 2
#define GPIO_D 3
#define GPIO_E 4
#define GPIO_F 5
#define GPIO_G 6
#define FTIR 1//Falling edge Trigger
#define RTIR 2//rising edge Trigger
/////////////////////////////////////////////////////////////////
JTAG Mode settings definition
#define Jtag_swd_disable 0X02
#define Swd_enable 0x01
#define Jtag_swd_enable 0x00

#endif

The header files for each project are as follows

#ifndef __hw_cfg_h__
#define __hw_cfg_h__
#define SMART

#ifdef SMART
LED Port definition
#define LED0 paout ()//PA15
#define LED1 Paout (8)//PA8
#define LED2 Pdout (13)
#define LED3 Pdout (14)
#define LED4 Pdout (15)
#defineLCD_CS_SET gpioa->bsrr=1<<0//chip Select port
#defineLCD_RS_SETGPIOA->bsrr=1<<1//Data/commands
#defineLCD_WR_SETGPIOA->bsrr=1<<3//write Data
#defineLCD_RD_SETGPIOA->bsrr=1<<2//Read data

#defineLCD_CS_CLR gpioa->brr=1<<0//chip Select port
#defineLCD_RS_CLRGPIOA->brr=1<<1//Data/commands
#defineLCD_WR_CLRGPIOA->brr=1<<3//write Data
#defineLCD_RD_CLRGPIOA->brr=1<<2//Read data
#define Lcd_port GPIOB
20150128
cckj 2011-12-22 0 1 2 3
PB0~15, as a data cable
#define DATAOUT (x) lcd_port->odr=x; Data output
#define DataIn lcd_port->idr; Data entry

#define PEN PAin (9)//PC1 INT
#define DOUT PAin (6)//PC2 miso
#define Tdin Paout (7)//PC3 MOSI
#define TCLK paout (5)//pc0 SCLK
#define TCS paout (4)//pc13 CS

Stm32 IO Operation header file specification

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